DRAM Technology Sr. Layout Design Engineer

Micron Technology, Inc.; Tlaquepaque; On-site; MXN 1,653,000 - 2,387,000; Full time

Benefits offered by this job

Medical plans

Dental plans

Vision plans

Income protection

Paid time off

Paid holidays

Job summary

Micron Technology, Inc. in Mexico is seeking a DRAM Layout Designer to translate schematics into physical layouts for fabrication reticles.

You will optimize IP layouts for DRAM products and collaborate with design, CAD, and global engineering teams to meet quality and timing targets. The role requires strong CMOS layout fundamentals, proficiency with Cadence Virtuoso and Mentor Calibre, and experience in physical verification tasks such as DRC/LVS.

Qualifications

• Bachelor's or Master's in Electronics Engineering, VLSI, Mechatronics, or related field.
• Experience developing custom layout designs in advanced CMOS tech with physical verification.
• Strong understanding of layout fundamentals including electromigration, IR drop, latch-up, parasitics, matching.
• Proficiency with Cadence Virtuoso and Mentor Calibre.
• Ability to collaborate with circuit designers, CAD teams, and cross-functional partners.

Responsibilities

• Develop and optimize IP layouts for DRAM products while ensuring compliance with design, process, and reliability requirements.
• Perform physical verification activities including DRC, LVS, EM, quality reviews, and documentation to support successful tape-out execution.
• Collaborate with design, CAD, and global engineering teams to solve layout challenges and drive project success.
• Guide and support team members through layout reviews, knowledge sharing, and technical problem-solving.
• Plan, communicate, and present layout strategies, progress, and results to stakeholders across worldwide teams.

Skills

Cadence Virtuoso

Layout design

DRC/LVS

EM analysis

IR drop

Parasitic analysis

Cross-functional collaboration

Education

Bachelor's or Master's in Electronics / VLSI

Tools

Mentor Calibre

Cadence tools

Job description

Req ID:
JR114533 DRAM Technology Sr. Layout Design Engineer

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

At Micron, we innovate to transform how the world uses information to enrich life. For more than 40 years, we have developed advanced memory and semiconductor technologies that power innovation across industries worldwide.

As a DRAM Engineering Group (DEG) Layout Designer at Micron Technology, Inc. you will be responsible for translating schematics into layout used for the creation of fabrication reticules. You will be required to meet all engineering and process related criteria needed for an assigned Dram product. You will organize and prioritize logistics and resource allocations to meet scheduled deadlines and proactively develop methodologies for issue resolution. In this role you will work with Design and other engineering groups to apply multiple layout techniques for the design and verification of digital and analog circuits. You will be expected to understand various circuit design protocols, different fab processes, mask generation techniques, and tape out processes and procedures.

Our team vision is a continuing desire to develop your skills working in a Team across worldwide geographies! Enabling the creative career path you deserve with a collaborative environment and groundbreaking technology and growing upon your imagination and creativity.

Responsibilities:

• Develop and optimize IP layouts for DRAM products while ensuring compliance with design, process, and reliability requirements.
• Perform physical verification activities including DRC, LVS, EM, quality reviews, and documentation to support successful tape-out execution.
• Collaborate with design, CAD, and global engineering teams to solve layout challenges and drive project success.
• Guide and support team members through layout reviews, knowledge sharing, and technical problem-solving.
• Plan, communicate, and present layout strategies, progress, and results to stakeholders across worldwide teams.

Minimum Qualifications:

• Bachelor's or Master's degree in Electronics Engineering, VLSI Engineering, Mechatronics, or a related field.
• Experience developing custom layout designs in advanced CMOS technologies with proficiency in physical verification methodologies.
• Strong understanding of layout fundamentals including electromigration, IR drop, latch-up, parasitic analysis, matching, shielding, coupling, and crosstalk effects.
• Proficiency with Cadence Virtuoso design environments and verification tools such as Mentor Calibre.
• Demonstrated problem-solving skills related to area optimization, power, performance, and layout quality.
• Ability to collaborate effectively with circuit designers, CAD teams, and cross-functional engineering partners.

Preferred Qualifications:

• Knowledge of layout automation, scripting, or SKILL programming to improve design efficiency.
• Understanding of the impact of physical layout on circuit speed, power consumption, capacitance, and area.
• Experience supporting global engineering teams and working in a highly collaborative environment.
• Ability to develop innovative approaches that improve productivity and turnaround time in layout design execution.
• Experience leveraging AI-powered tools to enhance workflow efficiency and engineering effectiveness.

Layout/Mask Designer E3

Relocation Level: TBD

Before Getting Started Please review Micron’s Internal Job Application Policy on your regional PeopleNow Career Opportunities page before searching and applying for jobs. Note in particular that:

• Hiring managers may view your performance appraisals, original resume, transcripts or other performance-related documentation in your personal file. This information will be held in confidence.
• If you are selected to interview for a position, you must notify your direct supervisor before participating in the interview process.

The specified role does not encompass the following responsibilities: Finalization of sales agreements or the execution of sales contracts is prohibited. The role also does not carry the authority to make definitive decisions regarding contracts, be it their conclusion or termination. Furthermore, the role is not designed to involve participation in pricing negotiations or the authorization of contracts. These activities fall beyond the permissible duties of the position.

Benefits:

• Micron offers a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget.
• Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave.
• Additionally, Micron benefits include a robust paid time-off program and paid holidays.

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.