Senior EDA Lead for Microelectronics Center (Hybrid)

Fondazione Chips-IT; Pavia; Hybrid; EUR 25,000 - 55,000; Full time

Benefits offered by this job

Hybrid work policy

Lunch tickets

Private health care coverage

International environment

Structured growth path with training

Job summary

Fondazione Chips-IT in Italy seeks a Lead for the Microelectronics Design Center EDA Support Group to oversee toolflows, PDK governance, and SoC development lifecycle from concept to tape-out.

You will coordinate with foundries and EDA vendors, maintain toolchains, and ensure robust lab infrastructure for advanced System-on-Chip projects. This role offers a hybrid work model in Pavia or Bologna.

Qualifications

• Master’s degree in Electrical Engineering, Computer Engineering, or closely related field with focus on EDA tools, PDKs, or semiconductor processes.
• Proven experience in maintaining EDA tools and managing PDKs (Cadence, Synopsys, Siemens).
• Strong understanding of semiconductor fabrication processes and interactions with foundries.
• Familiarity with hardware description languages (Verilog, VHDL) and digital/analog design workflows.
• Tape-out experience with advanced process nodes (16nm and below).

Responsibilities

• Coordinate with vendors for EDA tool procurement, licensing, and maintenance contracts.
• Maintain and optimize EDA toolchains for digital design (simulation, synthesis, verification, physical design).
• Manage PDK installations and updates, liaising with foundries for issue resolution and support.
• Maintain, calibrate, and troubleshoot hardware emulators for pre-silicon verification.
• Enable seamless integration of PDKs into EDA workflows across the full SoC design lifecycle.
• Document tool installations, maintenance procedures, and best practices.

Skills

Verilog

VHDL

Tape-out

Education

Master's degree in Electrical Engineering or Computer Engineering

Tools

Cadence

Synopsys

Siemens

Job description

Fondazione Chips-IT in Italy seeks a Lead for the Microelectronics Design Center EDA Support Group to oversee toolflows, PDK governance, and SoC development lifecycle from concept to tape-out.

You will coordinate with foundries and EDA vendors, maintain toolchains, and ensure robust lab infrastructure for advanced System-on-Chip projects. This role offers a hybrid work model in Pavia or Bologna.