Head of Silicon Design Infrastructure & Validation

FONDAZIONE CHIPS-IT; Cascina Vignazza; In loco; EUR 90.000 - 130.000; Tempo pieno

Descrizione del lavoro

Fondazione Chips-IT seeks a Lead of Silicon Design Support Infrastructure to establish and head a multi-domain design, validation and test infrastructure group. Based in Italy, the role will enable demonstrator development across digital, analog and power IC domains for internal teams and external partners.

The role requires building a capable team (5–10 engineers/technicians), managing EDA tools licenses, computing resources, and end-to-end workflows from architecture to tape-out, with a strong

Competenze

• Proven leadership of multi-domain silicon infrastructure projects.
• Experience in set-up and governance of engineering infrastructure teams.
• Strong understanding of digital, analog, and power IC design workflows.

Mansioni

• Set up and lead the Silicon Infrastructure Group, including 3-year budget forecasting.
• Define personnel profiles and recruitment plan (initially 5–10 hires).
• Manage licensing, compliance, and vendor relationships for multi-domain EDA tools.
• Oversee data security and IP protection for design data across projects.
• Run test facilities and safety programs for digital, analog, and power domains.
• Support technical roadmaps and resource allocation for silicon demonstrations from architecture to tape-out.
• Establish common design methodologies and best practices across groups.
• Coordinate collaboration infrastructure with universities and industry partners.
• Scout technology and coordinate pilot implementations with foundries and tools.

Conoscenze

EDA Tool Mgmt

Compute Infrastruct.

Workflow Automation

Design Tools Evaluation

Test & Validation

Strumenti

EDA Licenses (Synopsys, Cadence, Siemens, Keysight)

Descrizione del lavoro

Fondazione Chips-IT seeks a Lead of Silicon Design Support Infrastructure to establish and head a multi-domain design, validation and test infrastructure group. Based in Italy, the role will enable demonstrator development across digital, analog and power IC domains for internal teams and external partners.

The role requires building a capable team (5–10 engineers/technicians), managing EDA tools licenses, computing resources, and end-to-end workflows from architecture to tape-out, with a strong