CAD & EDA Flow Engineer

FONDAZIONE CHIPS-IT; Bologna; In loco; EUR 65.000 - 90.000; Tempo pieno

Descrizione del lavoro

FONDAZIONE CHIPS-IT in Bologna or Pavia seeks a CAD & EDA Flow Engineer to drive the EDA infrastructure for advanced SoC tape-out readiness. You will optimize toolchains, manage PDK integration, and coordinate with foundries and vendors to ensure robust design flows.

You will act as the technical backbone for R&D teams, maintaining licenses, scripting support, and documentation to accelerate digital, analog and RF design across the organization.

Competenze

• Experience managing EDA toolchains and licenses.
• Strong vendor relations with Cadence, Synopsys and Siemens.
• Experience with PDK integration for SoC design.
• Ability to work with foundries on DRC/LVS.

Mansioni

• Manage EDA tool procurement, licenses, and vendor relationships with Cadence, Synopsys, Siemens.
• Install, configure, and maintain PDKs across all design workflows (digital, analog and RF).
• Act as the primary technical liaison with foundries for PDK installation, maintenance, DRC/LVS.
• Maintain and optimize EDA toolchains for synthesis, simulation, verification, and physical implementation.
• Create and update internal trainings, technical documentation, scripts, and best practices for internal design teams.

Conoscenze

EDA flow

Vendor management

PDK integration

Scripting

Cross-domain design

Strumenti

Cadence

Synopsys

Siemens EDA

Descrizione del lavoro

We are seeking a CAD & EDA Flow Engineer to manage, optimize, and maintain our Electronic Design Automation (EDA) infrastructure. In this role, you will serve as the technical backbone for our R&D teams, managing relationships with EDA vendors and foundries, and ensuring smooth PDK integration for advanced SoC design up to tape-out.

The work can be carried out either in Pavia or in Bologna.

KEY RESPONSIBILITIES:

• Manage EDA tool procurement, licenses, and vendor relationships (Cadence, Synopsys, Siemens).
• Install, configure, and maintain Process Design Kits (PDKs) across all design workflows (digital, analog and RF).
• Act as the primary technical liaison with foundries for PDK installation and maintenance, design rule checks (DRC/LVS), and issue resolution.
• Maintain and optimize EDA toolchains for synthesis, simulation, verification, and physical implementation. Experience on emulation systems is a plus.
• Create and update internal trainings, technical documentation, scripts, and best practices for internal design teams.