Lead of Microelectronics Design Center EDA Support Group

Fondazione Chips-IT; Pavia; Ibrido; EUR 25.000 - 55.000; Tempo pieno

Vantaggi offerti da questo lavoro

Hybrid work policy

Lunch tickets

Private health care coverage

International environment

Structured growth path with training

Descrizione del lavoro

Fondazione Chips-IT in Italy seeks a Lead for the Microelectronics Design Center EDA Support Group to oversee toolflows, PDK governance, and SoC development lifecycle from concept to tape-out.

You will coordinate with foundries and EDA vendors, maintain toolchains, and ensure robust lab infrastructure for advanced System-on-Chip projects. This role offers a hybrid work model in Pavia or Bologna.

Competenze

• Master’s degree in Electrical Engineering, Computer Engineering, or closely related field with focus on EDA tools, PDKs, or semiconductor processes.
• Proven experience in maintaining EDA tools and managing PDKs (Cadence, Synopsys, Siemens).
• Strong understanding of semiconductor fabrication processes and interactions with foundries.
• Familiarity with hardware description languages (Verilog, VHDL) and digital/analog design workflows.
• Tape-out experience with advanced process nodes (16nm and below).

Mansioni

• Coordinate with vendors for EDA tool procurement, licensing, and maintenance contracts.
• Maintain and optimize EDA toolchains for digital design (simulation, synthesis, verification, physical design).
• Manage PDK installations and updates, liaising with foundries for issue resolution and support.
• Maintain, calibrate, and troubleshoot hardware emulators for pre-silicon verification.
• Enable seamless integration of PDKs into EDA workflows across the full SoC design lifecycle.
• Document tool installations, maintenance procedures, and best practices.

Conoscenze

Verilog

VHDL

Tape-out

Formazione

Master's degree in Electrical Engineering or Computer Engineering

Strumenti

Cadence

Synopsys

Siemens

Descrizione del lavoro

About Fondazione Chips-IT

The Foundation “Italian Center for the Design of Semiconductor Integrated Circuits,” also known as the Chips-IT Foundation, is a nonprofit research and technology organization under the supervision of the Ministries of Industry. The Foundation is Italy's first RTO (Research and Technology Organization) vertically focused on semiconductor research and stands as a center of excellence in frontier research on semiconductor design, as well as a pivotal center of the Italian semiconductor ecosystem and expertise.

• Promote the design and development of integrated circuits
• Strengthen the system of professional training in the field of microelectronics
• Ensure the establishment of a network of universities, research centers and enterprises that fosters innovation and technology transfer in the field

Position

The Chips-IT Foundation is seeking a senior professional to lead and support the activities of its Microelectronics Design Center. This role is central to ensuring the efficiency, reliability, and continuous evolution of design tools, laboratory infrastructure, and the overall R&D environment for advanced System-on-Chip (SoC) development. The Lead of Microelectronics Design Center EDA Support Group will be responsible for the maintenance, optimization, and governance of Electronic Design Automation (EDA) flows and Process Design Kits (PDKs). This position serves as a technical focal point for microelectronics design infrastructure, coordinating interactions with foundries and EDA vendors, while enabling seamless SoC design from concept through tape‑out. The work can be carried out either in Pavia or in Bologna.

Key Responsibilities

• Coordinate with vendors for EDA tool procurement, licensing, and maintenance contracts
• Maintain and optimize EDA toolchains for digital design, including simulation, synthesis, verification, and physical design
• Manage PDK installations and updates, acting as the technical liaison with foundries for issue resolution and continuous support
• Maintain, calibrate, and troubleshoot hardware emulators, ensuring uninterrupted research and pre‑silicon verification activities
• Enable seamless integration of PDKs into EDA workflows, supporting the full SoC design lifecycle from concept to tape‑out
• Ensure accurate and up‑to‑date documentation of tool installations, maintenance procedures, and best practices for EDA flows and laboratory equipment

Requirements

• Master’s degree in Electrical Engineering, Computer Engineering, or a closely related field with a focus on EDA tools, PDKs, or semiconductor processes
• Proven experience in maintaining EDA tools and managing PDKs (Cadence, Synopsys, Siemens)
• Strong understanding of semiconductor fabrication processes, including interactions with foundries
• Familiarity with hardware description languages (Verilog, VHDL) and digital and analog design workflows
• Tape‑out experience with advanced process nodes (16nm and below)

Benefits

• Competitive compensation based on qualifications and experience
• Opportunity to enter a PhD program while working
• Lunch tickets
• Private health care coverage dependent on role and contract
• Structured growth path with ongoing training and updates
• Networking opportunities with industry‑leading professionals
• International environment
• Hybrid work policy
• Tax deductions for eligible candidates (up to 90% for 6 to 13 years)
• In conformità con le normative vigenti, il range retributivo lordo annuo previsto per questa posizione è compreso tra Euro 25.000,00 e 55.000,00. L'ampiezza del range è finalizzata a valutare candidature con diversi livelli di seniority; l'offerta finale sarà strettamente commisurata all'effettiva esperienza e alle competenze del candidato, e sarà integrata dai benefit aziendali previsti per il ruolo.