VLSI Physical Design Engineer- Bangalore-6+ Years

Sdna Global; Bengaluru; On-site; INR 2,500,000 - 4,000,000; Full time

Job summary

Sdna Global is seeking an experienced PD Engineer to lead backend physical design and ECO-driven timing convergence for advanced nodes. You will work across synthesis, PnR, STA, and physical verification, leveraging powerful EDA tools and scripting to optimize flows.

Jointly with teams, you will drive low-power strategies and formal verification for NVIDIA-related projects, ensuring robust design implementations across multiple corners.

Qualifications

• 6+ years of experience in Physical Design.
• Strong expertise in backend design flow: Synthesis, PnR, STA, Physical Verification, LEC and EMIR.
• Hands-on with advanced nodes such as 3nm and 5nm.
• Experience creating ECOs for timing convergence across many corners using Tweaker/PrimeTime ECO.
• Strong experience in Physical Verification at Partition, SS and FC levels.
• Experience with Formal Verification / Logic Equivalence Checks.
• Experience in Low Power Design Implementation: UPF, multi-voltage domains, power gating.
• Hands-on experience with EDA tools: Fusion Compiler, EDI, DC Compiler, ICC2, Formality, Conformal LEC, RedHawk, StarRC, PrimeTime.
• Strong scripting in Perl, TCL and Shell.
• Prior NVIDIA project experience is mandatory.

Responsibilities

• Contribute to the entire backend design flow from synthesis to physical verification.
• Optimize ECOs for timing convergence across multiple corners and large designs.
• Collaborate on low power implementation using UPF and power-gating strategies.

Skills

Physical Design

Backend Design

PnR

STA

Synthesis

ECOs for Timing

3nm / 5nm

Physical Verification

Formal Verification

UPF / Low Power

Power Gating

NVIDIA Projects

Perl / TCL / Shell

Tools

Fusion Compiler

EDI

DC Compiler

ICC2

Formality

Conformal LEC

RedHawk

StarRC

PrimeTime

Tweaker

Job description

Job Title: PD Engineer Physical Design

Location: Bangalore
Experience: 6+ Years
Industry: Leading MNC
Employment Type: Full-Time

Job Description

We are looking for an experienced PD Engineer with strong expertise in Physical Design and hands-on experience across the complete backend design flow.

Mandatory Skills & Experience

• 6+ years of experience in Physical Design
• Strong expertise in complete backend design flow:
  Synthesis, PnR, STA, Physical Verification, LEC and EMIR
• Hands-on experience with advanced technology nodes such as 3nm / 5nm
• Expertise in preparing complex ECOs for timing convergence across a large number of corners using Tweaker / PrimeTime ECO
• Strong experience in Physical Verification at Partition, SS and FC levels
• Experience with Formal Verification / Logic Equivalence Checks
• Experience in Low Power Design Implementation, including:
• UPF
• Multi-voltage domains
• Power gating
• Hands-on experience with EDA tools:
  Fusion Compiler, EDI, DC Compiler, ICC2, Formality, Conformal LEC, RedHawk, StarRC and PrimeTime
• Strong scripting experience in Perl, TCL and Shell
• Prior experience working on NVIDIA projects is mandatory

Key Skills

Physical Design | Backend Design | PnR | STA | Synthesis | ECO | 3nm | 5nm | LEC | Formal Verification | EMIR | UPF | Fusion Compiler | ICC2 | PrimeTime | RedHawk | TCL | Perl | Shell Scripting | NVIDIA