TSMC Memory Compiler & Memview Engineer

Exiger Technologies; Hyderabad, Bengaluru; On-site; INR 2,500,000 - 4,000,000; Full time

Job summary

Exiger Technologies in Hyderabad is seeking an experienced TSMC Memory Compiler & Memview Engineer with deep expertise in memory compiler flows, Memview generation, and SRAM/Memory IP. You will contribute to advanced memory IP development and memory view generation across multiple architectures.

The role focuses on hands-on Memview generation, Memview servers, and familiarity with P4 and related flows. You will work with SRAM views—physical, timing, and logical—ensuring correct generation and

Qualifications

• Hands-on experience with SRAM/Memory IP and memory compiler flows.
• Experience in Memview generation and Memview servers.
• Knowledge of N2/N3 memory compiler flows is a plus.
• Familiarity with SRAM views: physical, timing, and logical.
• Understanding of P4 and related memory/compiler flows.

Responsibilities

• Develop and maintain memory compiler flows for SRAM memories.
• Generate SRAM memviews across physical, timing, and logical views.
• Collaborate with design teams to integrate Memview generation.

Skills

Memview generation

Memview servers

N2/N3 memory compiler flows

TSMC SRAM features

SRAM views

Memory IP

P4 flows

Job description

We are looking for an experienced TSMC Memory Compiler & Memview Engineer with strong expertise in memory compiler flows, Memview generation, and SRAM/Memory IP.

Key Responsibilities & Skills

• Hands-on experience in AMD Memview generation.
• Strong experience in creating and working with Memview servers.
• Knowledge of N2/N3 Memory Compiler flows will be an added advantage.
• Good understanding of TSMC SRAM features and SRAM generation based on required configurations.
• Strong knowledge of SRAM views generated/supported by Memory Compilers, including:
• Physical views
• Timing views
• Logical views
• Other relevant memory views
• Understanding of P4 and related memory/compiler flows.
• Experience with SRAM/Memory IP, Memory Compiler, and Memory View Generation is highly preferred.

Candidate Profile

• 35 years of relevant experience in SRAM/Memory IP or Memory Compiler domain.
• Strong understanding of memory compiler and memory view generation flows.
• Candidates with hands-on Memview generation experience are preferred.