STA Engineer

Ambit Semiconductors; Bengaluru; On-site; INR 1,200,000 - 1,600,000; Full time

Job summary

Ambit Semiconductors seeks a seasoned timing verification engineer in Bengaluru to drive STA and timing closure for ASIC/SoC blocks. You will own setup/hold analysis, signoff across subsystems, and ECO closure while leveraging PrimeTime/Tempus and Tcl scripting to ensure robust timing across advanced nodes.

Applicants should have 4+ years in STA/timing, with strong SDC constraint experience and knowledge of UPF, CTS, and cross-discipline timing impacts.

Qualifications

• 4+ years of STA and timing closure on ASIC/SoC designs.
• Expertise in Setup/Hold, MMMC, OCV/AOCV/POCV and timing signoff.
• Hands-on SDC constraints, timing exceptions, and ECO closure.
• Proficient in PrimeTime/Tempus and Tcl scripting.
• Subsystem/block-level timing signoff and advanced technology nodes.
• CTS, extraction, IR-drop, crosstalk and UPF timing impacts.

Skills

STA & timing closure

ASIC/SoC timing signoff

SDC constraints

Timing exceptions

ECO closure

PrimeTime/Tempus scripting

Tools

PrimeTime

Tempus

Job description

• 4+ years of STA and timing closure experience on ASIC/SoC designs
• Strong expertise in Setup/Hold analysis, MMMC, OCV/AOCV/POCV, CRPR, SI, and timing signoff
• Hands-on experience with SDC constraints, timing exception validation, and ECO closure
• Proficiency in PrimeTime/Tempus and Tcl scripting
• Experience in subsystem/block-level timing signoff and advanced technology nodes
• Good understanding of CTS, extraction, IR-drop, crosstalk, low-power (UPF), and physical design impacts on timing