STA Engineer

FiniteHR Consulting

Bengaluru

On-site

INR 1,000,000 - 1,500,000

Full time

14 days+

Get more replies from employers

Send a job-specific resume in minutes.

Job summary

FiniteHR Consulting is looking for an experienced professional in VLSI synthesis to join our team in Bengaluru, India. The ideal candidate should have a B.Tech. or M.Tech. degree, with 5-8 years of hands-on experience in synthesis and STA. You will be responsible for writing timing constraints for complex designs and conducting post-layout timing closures.

Knowledge in EDA tools and scripting (TCL, Perl) is crucial. Join us for a confidential role that promises to uphold the highest standards of EEO guidelines.

Qualifications

  • 5-8 years of experience in Synthesis and STA.
  • Hands-on experience with technology nodes like 28nm, 20nm, etc.
  • Expertise in I/O constraints developments for industry standard protocols.

Responsibilities

  • Write timing constraints for complex designs with multiple voltage domains.
  • Conduct post layout timing closure for multiple tape outs.
  • Develop I/O constraints for industry standard protocols.

Skills

Synthesis of complex SoCs
STA (Static Timing Analysis)
TCL scripting
Perl scripting
Knowledge of EDA tools (RC, DC, PT, PTSI)

Education

B.Tech. / M.Tech.

Job description

Responsibilities
  • B. Tech. / M. Tech. with 5-8 years of experience in Synthesis, STA
  • Expertise in synthesis of complex SoCs at block/top level and writing timing constraints for complex designs with multiple clocks and multiple voltage domains
  • Expertise on post layout timing closure for multiple tape outs, including timing ECOs and STA signoff
  • Expertise in I/O constraints developments for Industry standard protocols (e.g. DDR1/2/3, SDR, LPDDR, Flash, SPIs, Ethernet, USBHS, USBFS, JTAG, Display, etc.)
  • Hands‑on experience working on technology nodes like 28nm, 20nm, 14nm, 10nm
  • Good knowledge of EDA tools from RC, DC, PT, PTSI
  • Experience in formal verification RTL-to-netlist and netlist-to-netlist with DFT constraints
  • Good knowledge of VLSI process and device characteristics
  • Good understanding of deep submicron parasitic effects, crosstalk effects, etc.
Qualifications
  • B.Tech. / M.Tech.
  • 5-8 years experience in Synthesis, STA
  • TCL, Perl scripting

All your information will be kept confidential according to EEO guidelines.

Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

STA Engineer
STA Engineer

HrdWyr • Bengaluru Urban

On-site
INR 1,500,000 - 2,700,000
STA Lead Engineer
STA Lead Engineer

MediaTek • Bengaluru

On-site
INR 1,500,000 - 2,500,000
STA Engineer
STA Engineer

Proziod Analytics • Bengaluru

On-site
INR 1,000,000 - 1,500,000
Associate III - VLSI STA SG
Associate III - VLSI STA SG

UST • Bengaluru

On-site
INR 700,000 - 1,100,000
Staff Engineer – Physical Design (STA)
Staff Engineer – Physical Design (STA)

LeadSoc Technologies Pvt Ltd • Bengaluru

On-site
INR 4,000,000 - 7,000,000
STA Engineer
STA Engineer

ACL Digital • Bengaluru

On-site
INR 800,000 - 1,200,000
Senior Engineer-STA
Senior Engineer-STA

Arm • Bengaluru

On-site
INR 1,500,000 - 2,500,000
STA Engineer
STA Engineer

LeadSoc Technologies Pvt Ltd • Bengaluru

On-site
INR 1,400,000 - 2,100,000
Static Timing Analysis Engineer
Static Timing Analysis Engineer

Ciliconchip Circuit • Bengaluru Urban

On-site
INR 1,200,000 - 1,900,000
Lead Static Timing Analysis (STA) Engineer
Lead Static Timing Analysis (STA) Engineer

LeadSoc Technologies Pvt Ltd • Bengaluru

On-site
INR 3,000,000 - 6,000,000