RTL Design Engineer ( Lead / Senior )

MosChip®; Bengaluru; On-site; INR 1,800,000 - 3,000,000; Full time

Job summary

MosChip in Bengaluru is seeking an experienced hardware engineer to contribute to logic design and RTL coding for complex SoCs. You will work on Verilog/SystemVerilog, multi-clock designs, and asynchronous interfaces, ensuring proper timing and AMBA protocol integration.

The role requires hands-on experience with ASIC design tools (Lint, CDC), ECO fixes, and formal verification, along with strong communication and collaboration abilities to work with cross-functional teams.

Qualifications

• Experience in Logic design/RTL coding is a must.
• Experience in SoC design and integration for complex SoCs is a must.
• Experience in Verilog/System-Verilog is a must.
• Experience in multi-clock designs and asynchronous interfaces is a must.
• Experience in using the tools in ASIC development such as Lint and CDC.
• Experience in Synthesis / Understanding of timing concepts is a plus.
• Experience in ECO fixes and formal verification.
• Should have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset architecture.
• Excellent oral and written communication skills.
• Proactive, creative, curious, motivated to learn and contribute, with good collaboration skills

Skills

Logic design

RTL coding

SoC design

Verilog/SystemVerilog

Multi-clock designs

Asynchronous interfaces

ASIC tools (Lint/CDC)

Synthesis & timing

ECO fixes & formal verification

AMBA protocols (AXI/AHB/APB)

Communication & collaboration

Job description

Work Mode: Work from office ( 5 days a week )

Required Skills

• Experience in Logic design / RTL coding is a must.
• Experience in SoC design and integration for complex SoCs is a must.
• Experience in Verilog/System-Verilog is a must.
• Experience in multi-clock designs and asynchronous interfaces is a must.
• Experience in using the tools in ASIC development such as Lint and CDC.
• Experience in Synthesis / Understanding of timing concepts is a plus.
• Experience in ECO fixes and formal verification.
• Should have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset architecture.
• Excellent oral and written communication skills.
• Proactive, creative, curious, motivated to learn and contribute, with good collaboration skills