Layout Specialist

ACL Digital; Bengaluru Urban; On-site; INR 900,000 - 1,500,000; Full time

Job summary

Join a forward-thinking company as a Senior Talent Acquisition Executive, where your expertise in Analog Layout design will be pivotal in semiconductor manufacturing. This role offers the chance to work on advanced node processes, ensuring design manufacturability and yield through collaboration with verification and process engineers. You'll engage in layout parasitic extraction, conduct design reviews, and stay updated with the latest advancements in the field. If you're ready to make a significant impact in a dynamic environment, this opportunity is for you!

Qualifications

• Excellent experience in Analog Layout design and CMOS processes.
• Strong problem-solving skills in routing congestion and verification.
• Strong understanding of CMOS / Bi-CMOS / SOI / FinFET processes.
• Deep knowledge of analog layout concepts (matching, EM, latch-up, coupling, cross-talk, IR-drop, parasitics).
• Problem-solving skills in routing congestion and physical verification in custom layout.

Responsibilities

• Design and optimize analog layouts following best practices.
• Collaborate with verification and process teams for design robustness.
• Collaborate with process engineers to optimize layout designs according to process requirements.
• Conduct layout parasitic extraction and work with simulation team to optimize performance.
• Participate in design reviews and contribute to overall design improvements.
• Stay updated with advancements in analog layout techniques and industry standards.

Skills

Analog Layout Design

CMOS Process Understanding

Problem-Solving Skills

Routing Congestion Management

Physical Verification

Design rule compliance

Job description

Senior Talent Acquisition Executive at ACL Digital

Responsibilities:

• Excellent work experience in Analog Layout design in advanced node processes
• Hands on experience in any or multiple critical blocks such as BGR, LDO, Charge pump, SERDES, PHY, HDMI, PLL, ADC, DAC, Current Mirrors, Comparator, Differential Amplifier etc.
• Excellent understanding of CMOS / Bi-CMOS / SOI / FinFET process
• Excellent understanding of Analog Layout concepts (e.g. Matching, Electro-migration, Latch-up, Coupling, Cross-talk, IR-drop, Active and Passive parasitic devices etc.)
• Excellent problem-solving skills in Routing Congestion, Physical Verification in Custom Layout.
• Work closely with the verification team to address layout-related issues and ensure design robustness.
• Follow design rules, guidelines, and best practices to ensure design manufacturability and yield.
• Collaborate with process engineers to understand process requirements and optimize layout designs accordingly.
• Conduct layout parasitic extraction and work with the simulation team to validate and optimize design performance.
• Participate in design reviews and contribute to overall design improvements.
• Stay updated with the latest advancements in analog layout techniques, process technologies, and industry standards.

Seniority Level:

Mid-Senior level

Employment Type:

Full-time

Job Function:

Semiconductor Manufacturing