IP/RTL Design Architect for GPU

Mulya Technologies

VIP Area

On-site

INR 5,000,000 - 9,000,000

Full time

14 days+

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Benefits offered by this job

Competitive pay exceeding local standards
Work with exceptional engineers
Meritocratic workplace

Job summary

A leading semiconductor firm in India seeks an IP/RTL Design Architect to design high-performance GPU architectures. The ideal candidate will have extensive experience in ASIC design and a strong grasp of Verilog/SystemVerilog. This position offers competitive remuneration in a dynamic startup environment, working alongside top engineering talent to shape industry-leading products.

Qualifications

  • 15+ years in ASIC/FPGA IP/RTL design, with 3+ years in AI accelerators or GPU/TPU-like architectures.
  • Experience developing Verilog/SystemVerilog RTL.
  • Familiar with LPDDR6, HBM3, DDR5 memory interfaces.

Responsibilities

  • Design IP blocks for TPU cores including systolic arrays and memory subsystems.
  • Develop RTL for performance and timing optimization.
  • Optimize designs for AI workloads.
  • Optimize designs for throughput, latency and power efficiency in AI workloads.
  • Integrate LPDDR6, HBM3, DDR5 or chiplet-based memory interfaces.
  • Support synthesis, timing closure, FPGA prototyping and design verification.
  • Document microarchitecture and design specifications.

Skills

Verilog/SystemVerilog RTL design
Knowledge of GPU/TPU architectures
Experience with AXI, NoC protocols
Familiarity with high-bandwidth memory interfaces
Proficiency with synthesis and timing tools
Strong problem-solving skills
Teamwork

Education

BS/MS in Electrical/Computer Engineering

Tools

Synopsys Design Compiler

Job description

Mulya Technologies – Ranked as the most admirable partner for Intel India (2021).

Position Overview

IP/RTL Design Architect for GPU – 8+ years of experience designing IP/RTL for GPUs/TPUs with a focus on high-performance matrix multiplication, low-latency interconnects, and power-efficient AI acceleration.

Key Responsibilities
  • Design IP blocks for TPU cores, including systolic arrays, vector units, and memory subsystems.
  • Develop Verilog/SystemVerilog RTL for performance, timing, and area optimization.
  • Implement high-speed interconnects (e.g., AXI, NoC) for TPU/GPU data pipelines.
  • Optimize designs for high throughput, low latency, and power efficiency in AI workloads.
  • Integrate LPDDR6, HBM3, DDR5, or chiplet-based memory interfaces.
  • Support synthesis, timing closure, FPGA prototyping, and design verification.
  • Document microarchitecture and design specifications.
Required Qualifications
  • Education: BS/MS in Electrical/Computer Engineering.
  • Experience: 15+ years in ASIC/FPGA IP/RTL design, with 3+ years in AI accelerators or GPU/TPU-like architectures.
  • Skills:
  • Verilog/SystemVerilog RTL design. Proficient.
  • Knowledge of GPU/TPU architectures, systolic arrays, or matrix multiplication units.
  • Experience with AXI, NoC, or similar interconnect protocols.
  • Familiarity with LPDDR6, HBM3, DDR5, or high-bandwidth memory interfaces.
  • Proficiency with synthesis and timing tools (e.g., Synopsys Design Compiler).
  • Strong problem‑solving and teamwork skills.
Preferred Qualifications
  • Experience with AI/ML workloads or datacenter TPU designs and GPU architectures.
  • Knowledge of CXL, PCIe, UALink, or Ultra Ethernet.
  • Familiarity with power optimization for high-performance chips.
What is in it for you?
  • Pure play product work environment.
  • Chance to work with a tightly knit group of exceptional engineers from leading semiconductor companies.
  • Competitive pay that exceeds all semiconductor product players in the Indian market.
  • A meritocratic workplace where each peer is a star.
  • A chance to shape an industry-leading product from initial stages.
  • Opportunity to work at a startup with existing customers and investors.
  • Learn from industry veterans who have launched multiple billion‑dollar semiconductor firms.
Contact

Contact:

Mining The Knowledge Community

Seniority Level

Director

Employment Type

Full-time

Job Function

Design, Research, and Engineering

Industries

Semiconductor Manufacturing, Computer Hardware Manufacturing, and Appliances, Electrical, and Electronics Manufacturing

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