IO and Mixed Signal Layout Design Engineer

Broadcom; Bengaluru; On-site; INR 1,800,000 - 2,600,000; Full time

Job summary

Broadcom in Bengaluru is seeking an experienced Layout Engineer to design full custom I/O libraries and analog IPs across planar and FinFET technologies. You will drive floor-planning decisions and verify layouts to meet quality and schedule, collaborating across sites with a self-motivated, independent mindset.

The role requires 3+ years in electronics layout, strong Cadence Virtuoso and CALIBRE skills, and a proactive, team-focused approach.

Qualifications

• B.Tech in Electronics/Electrical engineering with 3+ years of experience.
• Hands-on experience in I/O Library and Analog Mixed-signal IP development and verification.
• Solid understanding of Planar and FinFET layouts and process technology.
• In-Depth knowledge of ESD and Latch-up principles for I/O and Analog layouts.
• Proficiency in using Cadence Virtuoso Layout suite and Siemens CALIBRE verification tools.
• Expertise in Layout verifications and debugging: DRC/LVS/ANT/ERC/DFM, LPE, PERC, EM and IR etc.
• Familiar with the Physical Design flow: LEF generation and PnR.
• Knowledge of AI, automation in layout, Script Programming and SKILL Programming is a plus.
• Excellent written and verbal communication skills to collaborate with circuit designers and teams across all sites.
• Self-motivated, capable of working independently, and a strong collaborative team player.

Responsibilities

• Design full custom layouts of I/O libraries and Analog Mixed Signal IP's.
• Drive critical floor-planning decisions to ensure optimal placement and routing.
• Perform comprehensive layout verification to ensure high quality and compliance.
• Complete ownership from end to end deliverables with quality within the schedule.
• Adapt quickly to new methodologies, remain open to new ideas, and communicate effectively with teams across all sites.

Skills

I/O library development

Analog mixed-signal IP

Planar FinFET layouts

ESD and latch-up knowledge

Layout verification

DRC/LVS/ANT/ERC/DFM

LEF generation & PnR

SKILL scripting

AI in layout

Communication & teamwork

Independent contributor

Education

B.Tech in Electronics/Electrical engineering

Tools

Cadence Virtuoso Layout Suite

Siemens CALIBRE

Job description

Job Description

• Design full custom layouts of I/O libraries and Analog Mixed Signal IP's in planar and FinFET technologies.
• Drive critical floor-planning decisions to ensure optimal placement and routing that meets design requirements and performance metric.
• Perform comprehensive layout verification to ensure high quality and compliance
• Complete ownership from end to end deliverables with quality within the schedule.
• Adapt quickly to new methodologies, remain open to new ideas, and communicate effectively with the teams across all sites.

Skills and Qualifications Required

• B.Tech in Electronics/Electrical engineering with 3+ years of experience
• Hands-on experience in I/O Library and Analog Mixed-signal IP development and verification
• Solid understanding of Planar and FinFET layouts and process technology
• In-Depth knowledge of ESD and Latch-up principles for I/O and Analog layouts
• Proficiency in using Cadence Virtuoso Layout suite and Siemens CALIBRE verification tools.
• Expertise in Layout verifications and debugging: DRC/LVS/ANT/ERC/DFM, LPE, PERC, EM and IR etc
• Familiar with the Physical Design flow: LEF generation and PnR
• Knowledge of AI, automation in layout, Script Programming and SKILL Programming is a plus.
• Excellent written and verbal communication skills to collaborate with circuit designers and teams across all sites
• Self-motivated, capable of working independently, and a strong collaborative team player.

R027656