DFT Verfication Engineer

ACL Digital; Hyderabad; On-site; INR 800,000 - 1,200,000; Full time

Job summary

ACL Digital is looking for a talented verification engineer with 5 to 8 years of experience in DFT feature verification, including JTAG and MBIST, in Hyderabad. The ideal candidate should have strong skills in Verilog, SystemVerilog, SVA, UVM methodologies, and C++. Familiarity with debugging tools and EDA simulation tools like Synopsys VCS and Cadence NCSIM, as well as knowledge of scripting languages, is essential. Join ACL Digital to innovate in the verification process and enhance product quality.

Qualifications

• 5 to 8 years experience in DFT feature verification.
• Strong background in Verilog, SystemVerilog (SV), SVA, UVM verification methodologies, and C++.
• Strong debug skills and experience with debug tools such as Verdi.
• Experience with EDA simulation tools like Synopsys VCS, Cadence NCSIM, Verdi.
• Experience with scripting languages like Tcl/Perl/Ruby/Python.
• Working knowledge of Unix/Linux OS and file version control.

Responsibilities

• Validate DFT features like JTAG and MBIST.
• Perform debug and verification tasks using EDA tools.
• Develop and maintain test scripts for automation.

Skills

DFT feature verification

Verilog

SystemVerilog

SVA

UVM verification methodologies

C++

debug tools

simulation tools

scripting languages

Unix/Linux OS

Tools

Synopsys VCS

Cadence NCSIM

Verdi

Job description

• 5 to 8 year experience in DFT feature verification (such as JTAG, MBIST, SCAN, fuse, IO-PHY loopback testing)
• Strong background in Verilog, SystemVerilog (SV), SVA, UVM verification methodologies and C++
• Strong debug skills and experience with debug tools such as Verdi.
• Experience with EDA simulation tools like Synopsys VCS, Cadence NCSIM, Verdi
• Experience with scripting languages like Tcl/Perl/Ruby/Python
• Working knowledge of Unix/Linux OS, file version control.

Additional skills:

• Experience in ATE debug, Synthesis, formal/LEC, or power analysis will be a plus.
• Strong analytical/problem solving skills and pronounced attention to details
• Knowledge of STA Constraints for various DFT modes.