Design and Verification Engineer

Scaledge; Hyderabad; On-site; INR 1,800,000 - 2,400,000; Full time

Job summary

Scaledge is seeking an ASIC/SoC Functional Verification engineer with hands-on SystemVerilog and UVM experience. You will verify high-speed interfaces (PCIe, USB, DDR, Ethernet, AXI/AMBA) and develop testbenches, coverage, and assertions using VCS, Questa, or Xcelium.

Strong analytical and debugging skills are essential; IP/SoC-level verification experience is preferred.

Qualifications

• Strong experience in SystemVerilog and UVM methodology.
• Hands-on expertise in high-speed interface protocols (PCIe / USB / DDR / Ethernet / AXI, etc.)
• Good understanding of verification concepts, coverage, assertions, and debugging
• Experience with simulation tools (VCS, Questa, Xcelium, etc.)
• Strong analytical & problem-solving skills

Responsibilities

• Strong experience in SystemVerilog and UVM methodology
• Hands-on expertise in high-speed interface protocols (PCIe / USB / DDR / Ethernet / AXI, etc.)
• Good understanding of verification concepts, coverage, assertions, and debugging
• Experience with simulation tools (VCS, Questa, Xcelium, etc.)
• Strong analytical & problem-solving skills

Skills

SystemVerilog

UVM

High-speed interfaces

Verification concepts

Assertions

Debugging

Tools

VCS

Questa

Xcelium

Job description

Role & responsibilities

• Strong experience in SystemVerilog and UVM methodology
• Hands-on expertise in high-speed interface protocols (PCIe / USB / DDR / Ethernet / AXI, etc.)
• Good understanding of verification concepts, coverage, assertions, and debugging
• Experience with simulation tools (VCS, Questa, Xcelium, etc.)
• Strong analytical & problem-solving skills

Preferred candidate profile

• 48 years of experience in ASIC/SoC Functional Verification.
• Strong hands-on experience in System Verilog and UVM.
• Experience with high-speed protocols such as PCIe, USB, DDR, Ethernet, AXI/AMBA.
• Good understanding of testbench development, assertions, functional coverage, debugging, and verification methodologies.
• Hands-on experience with VCS, Questa, or Xcelium.
• Strong analytical, debugging, and problem-solving skills.
• Candidates with experience in IP/SoC-level verification will be preferred.