Senior Design Verification Engineer

Verifast Technologies; Ahmedabad District, Pune District; On-site; INR 900,000 - 1,300,000; Full time

Job summary

Verifast Technologies is seeking a hardware verification engineer with strong SV/UVM knowledge and hands-on SoC verification experience. The candidate should be proficient in block-level verification, coverage-driven methods, andVerilog HDL, with familiarity in PCIe, USB, UCIe, CXL, Ethernet, AMBA and MIPI protocols.

Scripting with Perl or Python is advantageous. The role focuses on rigorous verification strategies for advanced SoC projects, involving test plans and software-assisted

Qualifications

• Strong SV and UVM knowledge.
• Hands-on experience with SoC/sub-system block-level verification and coverage-driven methodologies.
• Experience with protocols like PCIe/USB/UCIe/CXL/Ethernet/AMBA/MIPI.
• Solid understanding of digital hardware design and Verilog HDL.
• Experience with verification strategies for sophisticated SoC development, including software-based techniques.
• Good knowledge of test plan creation and tracking.
• Experience with Perl, Python or other scripting languages.

Skills

SV & UVM

SoC/block verification

Coverage-driven methodology

PCIe/USB/UCIe/CXL/Ethernet/AMBA/MIPI

Verilog HDL

SoC verification strategies

Test plan creation

Perl/Python scripting

Job description

• Strong SV and UVM Knowledge.
• Hands-on Experience on SoC/Sub-system /block level verification, knowledge of coverage-driven methodology
• Experience on protocols like PCIe/USB/UCIe/CXL/Ethernet/AMBA/MIPI
• Solid understanding of digital hardware design and Verilog HDL.
• A detailed understanding and experience of the current verification strategies required for sophisticated SoC development, including software-based techniques
• Good knowledge of test plan creation and tracking
• Experience with Perl, Python or other scripting language