Associate III - VLSI Analog Layout

UST; Bengaluru; On-site; INR 900,000 - 1,500,000; Full time

Job summary

UST is seeking an experienced Layout Engineer for analog and mixed-signal design in Bengaluru. You will contribute to layout of SerDes, LDO, BGR, Op-Amp, ADC, PLL and HSIO blocks, ensuring high‑quality physical implementations.

The role requires 4–8 years of hands-on experience, strong knowledge of device matching, LDE, and verification flows using Calibre and Cadence tools.

Qualifications

• Bachelor’s or Master’s degree in Electronics, Electrical Engineering, VLSI, or related discipline.
• 4–8 years hands-on experience in analog, mixed-signal, and I/O layout design.
• Strong experience with advanced technology nodes (2nm, 3nm, 5nm).

Responsibilities

• Design and layout analog/mixed-signal circuits with emphasis on matching, shielding, and layout‑dependent effects.
• Perform physical verification (DRC/LVS/PEX/ERC) and improve layout quality.
• Collaborate on SerDes TX/RX, LDO, BGR, Op-Amp, ADC, PLL, HSIO, and DDR/I/O blocks.
• Follow standard design flows and verify with tool flows (Calibre, DRC/LVS/PEX).

Skills

SerDes

Analog Layout

Analog Mixed-Signal

PLL

LVS

DRC

LDO

GPIO

Education

Bachelor's or Master's in Electronics / Electrical / VLSI

Tools

Cadence Virtuoso Layout Suite

Calibre

Job description

Role Description

Required Skills 4-8 years of hands-on experience in Analog, Mixed-Signal, and I/O Layout design. Strong experience with advanced TSMC and Samsung technology nodes (2nm, 3nm, and 5nm). Hands-on experience in the layout of one or more of the following: SerDes Transmitter (TX) Receiver (RX) LDO Bandgap Reference (BGR) Operational Amplifier (Op-Amp) ADC PLL HSIO GPIO DDR I/O Experience in custom layout methodologies, tools, and design flows. Strong knowledge of layout techniques, including device matching, common centroid, shielding, guard rings, EM/IR, and layout-dependent effects (LDE). Experience with physical verification including DRC, LVS, ERC, and PEX. Good understanding of semiconductor manufacturing processes and layout optimization techniques.

Preferred Tools Cadence Virtuoso Layout Suite Calibre (DRC/LVS/PEX) Custom layout automation tools and verification flows.

Qualifications Bachelor's or Master's degree in Electronics, Electrical Engineering, VLSI, or a related discipline.

Skills

• LDO
• GPIO
• PLL
• Analog Mixed-Signal
• Analog Layout
• LVS
• Signal Integrity
• SerDes