Analog Layout Engineer

Acme Services; Bengaluru; On-site; INR 1,800,000 - 3,600,000; Full time

Job summary

Acme Services in Bengaluru, India, seeks an experienced Analog Layout Engineer to drive custom layout for advanced RF/analog blocks. You will lead a small team, mentor engineers, and act as the technical focal point for customers on complex layout tasks.

Qualifications include hands-on layout for PLL/LNA/VCO, strong Cadence Virtuoso/XL and SKILL skills, and proficiency in DRC/LVS/ERC. Familiarity with PCell development and PDK maintenance is required.

Qualifications

• 4–12 years of relevant analog layout experience.
• Hands-on in custom analog layout for PLL, LNA, VCO, RF blocks.
• Strong proficiency with Cadence Virtuoso/Virtuoso XL and verification tools.

Responsibilities

• Lead custom analog layout for blocks such as PLL, DLL, LNA, VGA, ADC, DAC, LDO, Bandgap, VCO, and RF transceivers.
• Mentor a team of layout engineers and serve as technical focal for customers.
• Use Cadence Virtuoso/Virtuoso XL and SKILL; ensure PCell development and PDK maintenance.
• Oversee physical verification (DRC/LVS/ERC) and apply process-technology concepts.
• Advance layout methodologies and collaborate with global teams to deliver silicon solutions.
• Provide strong understanding of analog design concepts; exposure to digital Place & Route is a plus.

Skills

Cadence Virtuoso

SKILL Programming

PCell development

DRC/LVS/ERC

Analog design concepts

Team mentoring

Layout methodologies

Layout verification

Tools

Cadence Virtuoso

Virtuoso XL

SKILL Programming

Calibre

Assura

Hercules

PDK maintenance

PCell development

DRC/LVS/ERC

Job description

Hiring experienced Analog Layout Engineer - Leading Global semiconductor Design Organization

We are looking for experienced Analog Layout Engineers to work on next-generation Analog, Mixed-Signal, and RF IC designs. This role offers the opportunity to work on advanced semiconductor technologies, lead custom layout activities, and collaborate with global engineering teams to deliver high-performance silicon solutions.

Experience: 4 to 12 Years

Key Responsibilities:

Hands-on experience in Custom Analog Layout for blocks such as PLL, DLL, LNA, VGA, ADC, DAC, LDO, Bandgap, VCO, and RF Transceivers.

Strong expertise in Cadence Virtuoso/Virtuoso XL, SKILL Programming, and physical verification tools such as Calibre, Assura, and Hercules.

Experience in PCell development, PDK maintenance, and custom layout methodologies.

Strong understanding of physical verification (DRC/LVS/ERC), semiconductor process technologies, and fabrication concepts.

Ability to lead and mentor a team of layout engineers while acting as the technical focal point for customers.

Good understanding of analog design concepts with exposure to digital Place & Route being an added advantage.