ASIC Design Verification Engineer

PQAngels Technologies Pvt. Ltd.; Bengaluru; On-site; INR 1,200,000 - 1,800,000; Full time

Benefits offered by this job

Competitive pay

Career growth

Global projects exposure

Collaborative environment

Cutting-edge tech

Continuous learning

Job summary

PQAngels Technologies is hiring an ASIC Design Verification Engineer to verify complex ASIC designs using SystemVerilog and UVM, building testbenches and coverage metrics. This on-site role is based in the Greater Bengaluru Area and involves close collaboration with RTL and PD teams.

You will develop verification plans, run regression suites, and perform protocol verification while documenting findings for quality and performance improvements.

Qualifications

• Bachelor’s or Master’s degree in Electronics, Electrical, ECE, VLSI, Microelectronics or related field.
• Soft Skills: Strong communication, analytical thinking, stakeholder management and problem solving with global teams.

Responsibilities

• Develop verification plans.
• Build reusable UVM environments.
• Functional coverage closure.
• Assertions and debugging.
• Regression execution.
• Testbench development.
• Root cause analysis.
• Protocol verification.
• Customer interactions.
• Documentation.
• Verification signoff activities.
• Collaborate with RTL and PD teams.

Skills

SystemVerilog

UVM

SVA

Functional Coverage

Protocol Verification

Python/TCL Tools

PCIe

DDR

USB

ASIC/SoC familiarity

Education

Bachelor/Master in Electronics

Tools

VCS

Xcelium

QuestaSim

Verdi

Job description

• Testbench development.
• Protocol Verification
• Verdi

Company Description

PQAngels Technologies is a specialized in building high-performance engineering teams for the Post Quantum era of innovation. The company connects cutting-edge technology organizations with highly skilled professionals in Semiconductors, Cloud Computing, and Data Storage ecosystems. PQAngels Technologies focuses on niche engineering roles, enabling clients to innovate faster while offering candidates access to advanced projects and career growth. Applicants can expect to work with leading global tech companies and be part of teams driving next-generation hardware and software solutions.

Role Description

The ASIC Design Verification Engineer - PQAngels will be responsible for verifying complex ASIC designs using industry-standard methodologies and tools. Day-to-day activities include developing verification plans, creating and maintaining test benches, writing test cases, performing functional and formal verification, and analyzing coverage metrics. The role involves close collaboration with RTL design engineers and architects to understand specifications, identify corner cases, and debug design and verification issues. The engineer will document findings, contribute to process improvements, and ensure that designs meet performance, reliability, and quality requirements. This is a full-time, on-site role based in the Greater Bengaluru Area.

Key Responsibilities

• Develop verification plans.
• Build reusable UVM environments.
• Functional coverage closure.
• Assertions and debugging.
• Regression execution.
• Testbench development.
• Root cause analysis.
• Protocol verification.
• Customer interactions.
• Documentation.
• Verification signoff activities.
• Collaborate with RTL and PD teams.

Mandatory Technical Skills

• SystemVerilog
• UVM
• SVA
• Functional Coverage
• Protocol Verification
• Python/TCL EDA Tools
• VCS
Xcelium
• QuestaSim
• Verdi
• PCIE ,DDR, USB, UCIE ASIC or SoC projects

Qualifications

Bachelor's or Master's degree in Electronics, Electrical, ECE, VLSI, Microelectronics or related field. Soft Skills Strong communication, analytical thinking, stakeholder management, problem solving and ability to work in global teams.

Benefits

• Competitive compensation
• Learning & career growth
• Exposure to global semiconductor projects
• Collaborative work environment
• Opportunities to work on cutting-edge technologies
• Continuous technical learning