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PQAngels Technologies Pvt. Ltd. seeks an experienced ASIC Design Verification Engineer in Bengaluru to verify complex ASICs using SystemVerilog/UVM. You will craft verification plans, build testbenches, write test cases, and perform functional and protocol verification with RTL/PD teams.
You will drive coverage metrics, debug issues, and document findings while ensuring performance and quality requirements across global projects in a fast-paced environment.
PQAngels Technologies is a specialized in building high-performance engineering teams for the Post Quantum era of innovation. The company connects cutting-edge technology organizations with highly skilled professionals in Semiconductors, Cloud Computing, and Data Storage ecosystems. PQAngels Technologies focuses on niche engineering roles, enabling clients to innovate faster while offering candidates access to advanced projects and career growth. Applicants can expect to work with leading global tech companies and be part of teams driving next-generation hardware and software solutions.
The ASIC Design Verification Engineer – PQAngels will be responsible for verifying complex ASIC designs using industry-standard methodologies and tools. Day-to-day activities include developing verification plans, creating and maintaining test benches, writing test cases, performing functional and formal verification, and analyzing coverage metrics. The role involves close collaboration with RTL design engineers and architects to understand specifications, identify corner cases, and debug design and verification issues. The engineer will document findings, contribute to process improvements, and ensure that designs meet performance, reliability, and quality requirements. This is a full-time, on-site role based in the Greater Bengaluru Area.
Bachelor's or Master's degree in Electronics, Electrical, ECE, VLSI, Microelectronics or related field. Soft Skills Strong communication, analytical thinking, stakeholder management, problem solving and ability to work in global teams.