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UST in Bengaluru, India seeks an experienced engineer for Analog/Mixed-Signal CMOS full-custom layout. You will work with Cadence Platform, apply layout concepts such as matching, shielding, symmetry, and ESD, and contribute to PDK/rules development.
Collaboration with design and layout leads is expected to deliver on-time results. Ideal candidates have 2–8 years of related experience, strong problem-solving skills, and the ability to work effectively in diverse teams.