Analog layout 4+ years

AIonSi India Pvt Ltd; Bengaluru; On-site; INR 1,200,000 - 2,100,000; Full time

Job summary

AIonSi India Pvt Ltd is a semiconductor solutions startup delivering VLSI design and verification, automotive functional safety, and artificial intelligence solutions for global semiconductor clients. The role requires hands-on layout experience for critical analog blocks, expertise with Finfet technologies, and proficiency in Calibre PV checks; Samsung foundry background is preferred.

Strong communication and collaboration skills are essential for success in a fast-paced environment.

Qualifications

• Hands-on experience in layout design of analog blocks (LDO, Bandgap, Oscillators).
• Experience with Finfet technologies and Samsung foundry preferred.
• Proficient in Totem EMIR, Self-heating effects, RC extraction, Calibre PV checks (DRC, LVS, Antenna, ERC, PERC).
• Strong understanding of layout fundamentals (matching, EM, ESD, latch-up, crosstalk).
• Knowledge of circuit design concepts and analog design.
• Experience in top-level floorplan and hierarchical layout methodologies.
• Good verbal and written communication skills.

Skills

Analog layout

Finfet tech

Samsung foundry

Totem EMIR

Self-heating

RC extraction

Calibre PV

DRC/LVS

Antenna checks

Layout basics

Circuit concepts

Analog design

Floorplan

Hierarchical layout

Communication skills

Job description

Company Description AIonSi is a semiconductor solutions startup delivering VLSI design and verification, automotive functional safety, and artificial intelligence solutions for global semiconductor clients.

• Hands‑on experience in layout design of critical analog blocks such as LDO, Bandgap, Oscillators etc.
• Must have experience in Finfet technologies. Samsung foundry experience is preferred.
• Must have expertise on Totem EMIR & Self‑heating effects, Star RC extraction, and Calibre PV checks (DRC, LVS, Antenna, ERC, PERC etc.),
• Good Understanding of layout fundamentals (Matching, EM, ESD, Latch up, coupling, crosstalk etc.).
• Good understanding of circuit design concepts and analog design.
• Experience in top‑level floorplan, hierarchical layout methodologies.
• Good Verbal and written communication skills.
• Candidate should be already on company’s payroll.
• Candidates having only memory/Standard Cell layout experience are not relevant to this requirement.