Analog Layout Engineer | Physical Design Engineer | AMS Layout Design

Acesoft Labs; Bengaluru; On-site; INR 1,200,000 - 2,400,000; Full time

Job summary

Acesoft Labs in Bengaluru, India seeks an experienced IC design engineer to drive analog/mixed-signal block development for advanced process nodes. You will collaborate with cross-functional teams to deliver block-level layouts and ensure rigorous LVS/DRC/DFM checks.

The role requires 4–8 years of hands-on experience with latest nodes, power management blocks, and a strong command of Cadence VLE/VXL and Mentor Calibre tools. You will work independently to meet tight project timelines.

Qualifications

• 4–8 years in design and development of critical analog, mixed-signal blocks.
• Experience with leading nodes such as 16/12/7/5/3nm and other foundries like Intel/Samsung GF.
• Expertise in block-level layout, LVS/DRC/DFM and antenna checks.

Responsibilities

• Support full chip-level integration and ensure on-time delivery of block-level layouts.
• Work with cross-functional teams to verify and optimize analog blocks (regulators, charge pumps, PMICs).
• Apply Cadence and Mentor tools for layout, LVS, DRC, and DFM checks.

Skills

Cross-functional collaboration

Independent work

Hands-on experience on latest nodes

Communication skills

Education

BE or MTech in Electronics/VLSI Engineering

Tools

Cadence VLE/VXL

Mentor Calibre DRC/LVS

Job description

Role & responsibilities

Description :

• 4 to 8 years of experience in Design and development of critical analog, mixed-signal, custom digital block.
• TSMC 16/12nm,7nm,5nm,3nm and below (foundries are also fine like Intel, Samsung, GF)
• Preferably TSMC 5nm/3nm experience.
• Responsible full chip level integration support.
• Verification flows - LVS/DRC/DFM/Antenna check/EMIR experience.
• Responsible for on-time delivery of block-level layouts of acceptable quality.
• Expertise in Cadence VLE/VXL and Mentor Graphic Caliber DRC/LVS is a must.
• Analog blocks like Regulators/Charge pumps/Power Management etc.
• HBM experience is an added advantage.

Preferred candidate profile

• BE or MTech in Electronics/VLSI Engineering
• Good communications skills as we work with cross-functional teams.
• Good hands-on experience in recent times on lowers nodes.
• Should work independently