Staff Subsystem Design Engineer - Edge AI RTL/IP Expert

CamWebDir; United Kingdom; Hybrid; GBP 90,000 - 130,000; Full time

Job summary

Arm Cambridge, United Kingdom, is seeking a Staff Subsystem Design Engineer to develop complex IPs and subsystem architectures. You will contribute across RTL design, microarchitecture, and integration, collaborating with architects, verification, and implementation teams to deliver high-quality subsystems.

You will work on low-power design methodologies, UPF, and AMBA interfaces, with a focus on performance, area, and power trade-offs. This role offers a hybrid Cambridge-based working pattern.

Qualifications

• Bachelor's/Master's/PhD in Electrical/Electronic/Computer Engineering or related.
• 10+ years in industry with RTL and IP/subsystem design.
• Strong SystemVerilog/Verilog experience.
• Delivery record of sophisticated IP or RTL subsystems.
• Familiar with EDA tools and methodologies.
• UPF/power-domain design knowledge.
• AMBA AXI/APB protocols familiarity.
• Excellent communication and teamwork.

Responsibilities

• Analyse architectural specs with architects to refine solutions.
• Develop subsystem and IP microarchitecture specs from requirements.
• Design and integrate IP and subsystems with Arm and third-party IP.
• Ensure robust integration with interfaces and system interactions.
• Define UPF constraints and timing considerations.
• Perform design quality checks (Lint, CDC, RDC, X-propagation).
• Collaborate with verification to review test plans and debugging.
• Work with implementation, performance and power teams to meet targets.
• Improve design flows and drive timely delivery.
• Provide technical guidance and design reviews to peers.

Skills

SystemVerilog RTL

IP/Subsystem design

AMBA AXI/APB

UPF/Power domains

SVA & formal

EDA tools

UVM

Communication skills

Education

Bachelor/Master/PhD in EE/EC/CE

Tools

EDA tools

UVM

Job description

Arm Cambridge, United Kingdom, is seeking a Staff Subsystem Design Engineer to develop complex IPs and subsystem architectures. You will contribute across RTL design, microarchitecture, and integration, collaborating with architects, verification, and implementation teams to deliver high-quality subsystems.

You will work on low-power design methodologies, UPF, and AMBA interfaces, with a focus on performance, area, and power trade-offs. This role offers a hybrid Cambridge-based working pattern.