Staff Hardware Architect: RTL, Verification & AI

ARM; Cambridge; Hybrid; GBP 85,000 - 110,000; Full time

Job summary

ARM in Cambridge is seeking a Staff Hardware Engineer to drive the design of digital hardware across RTL, verification and synthesis. You will translate architectural ideas into efficient hardware while balancing performance, power and area.

Collaborate with architects and engineering teams to push innovative solutions, explore AI-assisted tooling, and contribute to scalable hardware platforms and subsystems throughout the development lifecycle.

Qualifications

• Experience designing and verifying synthesizable RTL using SystemVerilog or Verilog.
• Ability to develop and maintain testbenches and investigate functional verification issues.
• Experience using synthesis to evaluate RTL implementation results and support gate-level builds.
• Ability to analyse technical problems, communicate design decisions clearly and collaborate across engineering disciplines.

Responsibilities

• Design, develop and maintain synthesizable RTL using SystemVerilog or Verilog.
• Translate architectural and functional requirements into efficient hardware implementations.
• Develop verification environments, including testbenches, and perform functional verification.
• Integrate digital IP blocks and subsystems, including interfaces, control logic and datapaths.
• Partner with system architects and engineering teams to evaluate performance, power and area trade-offs.
• Debug, optimise and integrate RTL, and use synthesis results to assess implementation outcomes.
• Improve hardware development workflows through automation and exploration of AI-assisted tooling.

Skills

SystemVerilog

RTL design

Testbenches

Functional verification

Tools

FPGA build

AI-assisted tooling

Scripting

Job description

ARM in Cambridge is seeking a Staff Hardware Engineer to drive the design of digital hardware across RTL, verification and synthesis. You will translate architectural ideas into efficient hardware while balancing performance, power and area.

Collaborate with architects and engineering teams to push innovative solutions, explore AI-assisted tooling, and contribute to scalable hardware platforms and subsystems throughout the development lifecycle.