Senior Subsystem & SoC RTL Design Engineer

CamWebDir; United Kingdom; Hybrid; GBP 90,000 - 130,000; Full time

Job summary

Arm Cambridge is seeking an experienced SoC design engineer to contribute to RTL development and verification for GPU and control subsystems. You will work on IP integration, design checks, and micro-architecture specs, collaborating with verification and implementation teams to ensure high-quality, timely delivery.

Ideal candidates will have SystemVerilog experience, familiarity with ARM architectures and AMBA standards, and strong C/C++ skills.

Qualifications

• Experience with RTL design and verification for complex SoCs.
• Hands-on SystemVerilog/Verilog HDL for RTL design and integration.
• Familiarity with Arm architectures, AMBA standards, and SPICE-aware flows.
• Exposure to safety standards such as ISO 26262 is a plus.

Responsibilities

• Develop RTL and design intent deliverables (SDC, UPF) for subsystems.
• Integrate IPs, run design checks, and help debug functional issues.
• Collaborate with verification and implementation teams to ensure timely delivery.
• Write specifications and documentation for complex designs.

Skills

SystemVerilog / Verilog HDL

RTL design

CPU/GPU/IP

Unix scripting

Arm architecture / AMBA

C/C++

SoC development

Functional Safety ISO 26262

Tools

Synthesis tools

UPF/SDC

Job description

Arm Cambridge is seeking an experienced SoC design engineer to contribute to RTL development and verification for GPU and control subsystems. You will work on IP integration, design checks, and micro-architecture specs, collaborating with verification and implementation teams to ensure high-quality, timely delivery.

Ideal candidates will have SystemVerilog experience, familiarity with ARM architectures and AMBA standards, and strong C/C++ skills.