Senior SoC Design Engineer: RTL & IP Integration

ARM; Bagstone; Hybrid; GBP 65,000 - 90,000; Full time

Job summary

ARM LIMITED is seeking an RTL engineer to contribute to multi-IP SoC developments across IoT, Automotive and infrastructure contexts. You will integrate IPs, craft subsystem microarchitecture specs, and develop RTL while supporting verification and performance improvement efforts.

You will collaborate with internal teams globally, review architecture, and help refine IP designs, ensuring efficient design checks and robust system-level integration.

Qualifications

• Bachelor's or Master's degree in Electrical/Computer Engineering or related field, or equivalent experience.
• Experience in digital hardware design and Verilog HDL.
• Knowledge of current methods for complex SoC development.
• Experience with static design checks (CDC, RDC, X-prop, lint).

Responsibilities

• Understand incoming IPs and their interfaces for subsystem integration.
• Develop subsystem microarchitecture specs and RTL.
• Review verification test plans and help debug issues.
• Collaborate with performance analysis to optimize system performance.
• Guide team members and balance project plans with management input.

Skills

Verilog HDL

Digital hardware design

SoC architecture

Scripting languages

Debugging and verification

PPA trade-offs

Power and performance optimization

Communication & collaboration

Education

Bachelor's or Master's in Electrical/Computer Engineering

Tools

Synthesis tools

Timing analysis tools

RTL design tooling

Job description

ARM LIMITED is seeking an RTL engineer to contribute to multi-IP SoC developments across IoT, Automotive and infrastructure contexts. You will integrate IPs, craft subsystem microarchitecture specs, and develop RTL while supporting verification and performance improvement efforts.

You will collaborate with internal teams globally, review architecture, and help refine IP designs, ensuring efficient design checks and robust system-level integration.