Senior Hardware Engineer – RTL, Verification & AI-Driven Design

CamWebDir; Cambridge; Híbrido; GBP 90.000 - 120.000; Jornada completa

Descripción de la vacante

CamWebDir is seeking a Staff Hardware Engineer in Cambridge to help develop innovative hardware platforms and subsystems. The role covers architectural exploration, RTL design, functional verification and synthesis, shaping decisions across the hardware development lifecycle.

You will collaborate with architects and engineering teams to turn requirements into efficient digital hardware, balancing performance, power and area.

Formación

• Experience designing and verifying synthesizable RTL using SystemVerilog or Verilog.
• Ability to develop and maintain testbenches and investigate functional verification issues.
• Experience using synthesis to evaluate RTL implementation results and support gate-level builds.
• Ability to analyse technical problems, communicate design decisions clearly and collaborate across engineering disciplines.

Responsabilidades

• Design, develop and maintain synthesizable RTL using SystemVerilog or Verilog.
• Translate architectural and functional requirements into efficient hardware implementations.
• Develop verification environments, including testbenches, and perform functional verification.
• Integrate digital IP blocks and subsystems, including interfaces, control logic and datapaths.
• Partner with system architects and engineering teams to evaluate performance, power and area trade-offs.
• Debug, optimise and integrate RTL, and use synthesis results to assess implementation outcomes.
• Improve hardware development workflows through automation and exploration of AI-assisted tooling.

Conocimientos

SystemVerilog RTL design

Testbenches & verification

RTL synthesis & gate-level builds

Cross-disciplinary communication

Descripción del empleo

CamWebDir is seeking a Staff Hardware Engineer in Cambridge to help develop innovative hardware platforms and subsystems. The role covers architectural exploration, RTL design, functional verification and synthesis, shaping decisions across the hardware development lifecycle.

You will collaborate with architects and engineering teams to turn requirements into efficient digital hardware, balancing performance, power and area.