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Apple, Inc. seeks a Design Verification Engineer in Swindon to enable bug-free first silicon for mixed-signal designs, collaborating with Digital and Analog teams. You will craft verification plans, build and maintain test benches, and run constrained random tests to verify complex designs.
You’ll develop coverage points, analyze results, and refine verification environments to reach full coverage. Strong SystemVerilog/UVM knowledge and scripting abilities are essential.
Apple, Inc. seeks a Design Verification Engineer in Swindon to enable bug-free first silicon for mixed-signal designs, collaborating with Digital and Analog teams. You will craft verification plans, build and maintain test benches, and run constrained random tests to verify complex designs.
You’ll develop coverage points, analyze results, and refine verification environments to reach full coverage. Strong SystemVerilog/UVM knowledge and scripting abilities are essential.