Design Verification Engineer - Power Management (Early Career or Experienced)

Apple; Swindon; On-site; GBP 70,000 - 100,000; Full time

Job summary

Apple, Inc. seeks a Design Verification Engineer in Swindon to enable bug-free first silicon for mixed-signal designs, collaborating with Digital and Analog teams. You will craft verification plans, build and maintain test benches, and run constrained random tests to verify complex designs.

You’ll develop coverage points, analyze results, and refine verification environments to reach full coverage. Strong SystemVerilog/UVM knowledge and scripting abilities are essential.

Qualifications

• Strong knowledge of SystemVerilog and UVM.
• Experience developing scalable and portable test-benches.
• Experience with constrained random verification environments.
• MS/BS in Computer Science or Electrical Engineering or equivalent.
• Fluency in English language is required.

Responsibilities

• Develop verification plans in coordination with design leads and architects.
• Build and maintain verification test bench components and environments.
• Generate directed and constrained random tests and run simulations.
• Analyze coverage and improve test environments to target holes.
• Provide sign-off for RTL freeze and tape-out.

Skills

SystemVerilog & UVM

Test bench development

Constrained random verification

English fluency

Object Oriented Programming

Formal verification knowledge

Python / Perl / TCL

Mixed-signal verification basics

Education

MS/BS in Computer Science or Electrical Engineering

Tools

Python

Perl

TCL

Job description

At Apple, we work every single day to craft products that enrich people's lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? We have an opportunity for a driven and highly committed Design Verification Engineer. As a member of our multifaceted group, you will have the unique opportunity to craft upcoming products that will delight and encourage millions of Apple's customers every day. We are looking for a Design Verification Engineer in our team, who will enable bug-free first silicon for our mixed-signal designs, in close collaboration with Digital and Analog Design engineers. The responsibilities include all phases of pre-silicon verification including, establishing design verification methodology and test-plan development. Additional responsibilities will include verification environment development, such as stimulus and checkers, test-writing, debug, coverage, sign-off for RTL freeze and tape-out.

Description

In this role you will develop verification plans in coordination with design leads and architects. You’ll be responsible for building and maintaining verification test bench components and environments. Generate directed and constrained random tests. Run simulations and debug design and environment issues. Build functional coverage points, analyze coverage, and improve test environment to target coverage holes. Craft automated verification flows for block and chip level verification. Apply knowledge of hardware description languages (VHDL/Verilog), hardware verification languages (SystemVerilog/UVM/OVM/VVM), and logic simulators to verify complex designs. Work with other block and core level engineers to ensure a flawless verification flow.

Minimum Qualifications

• Strong knowledge of SystemVerilog and UVM
• Experience developing scalable and portable test-benches
• Experience with constrained random verification environments
• MS/BS in Computer Science or Electrical Engineering or equivalent
• Fluency in English language is required

Preferred Qualifications

• Experience defining coverage space, writing coverage model, analyzing results
• Experience with Assertion Based Verification
• Knowledge of Object Oriented Programming
• Experience in Formal Verification (Formal Linting, Formal connectivity, user property verification)
• Experience with Python, Perl or TCL
• Excellent communication and interpersonal skills combined with the ability to collaborate
• Basic knowledge of mixed signal verification

At Apple, we're not all the same. And that's our greatest strength. We draw on the differences in who we are, what we've experienced and how we think. Because to create products that serve everyone, we believe in including everyone. Therefore, we are committed to treating all applicants fairly and equally. As a registered Disability Confident employer, we will work with applicants to make any reasonable accommodations. Apple will consider for employment all qualified applicants with criminal backgrounds in a manner consistent with applicable law. Learn more

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