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Apple in the United Kingdom seeks a Design Verification Engineer to enable bug-free silicon for mixed-signal designs. You will develop verification plans, build test benches, and collaborate with Digital and Analog teams to verify complex architectures.
Strong SystemVerilog/UVM skills, a CS or EE degree, and fluent English are essential. You will work with a cross-disciplinary group on edge‑case verification, sign-off readiness, and feature validation for upcoming Apple products.
Apple in the United Kingdom seeks a Design Verification Engineer to enable bug-free silicon for mixed-signal designs. You will develop verification plans, build test benches, and collaborate with Digital and Analog teams to verify complex architectures.
Strong SystemVerilog/UVM skills, a CS or EE degree, and fluent English are essential. You will work with a cross-disciplinary group on edge‑case verification, sign-off readiness, and feature validation for upcoming Apple products.