GPU Front-End Implementation Engineer (Verilog & PPA)

. Apple (UK) Limited; United Kingdom; On-site; GBP 45,000 - 65,000; Full time

Job summary

Apple (UK) Limited is seeking a GPU Front End Implementation engineer to optimise PPA of the netlist and work closely with RTL and Physical design teams to deliver high-quality netlists for partition milestones. The role involves enhancing methodologies and contributing to outstanding GPUs for Apple products.

You will collaborate with IP teams across multiple sites to translate designs into efficient RTL and gate-level implementations, focusing on timing and performance within Apple Silicon.

Qualifications

• BSc in EE is required.
• Proficient in Verilog and SystemVerilog; familiarity with scripting languages.
• Experience with physical synthesis and PPA optimization techniques.

Responsibilities

• Focus on PPA optimisation of the netlist and collaborate with RTL and Physical design teams.
• Deliver key netlist quality milestones for your partition and contribute to improving current methodologies.
• Collaborate with IP teams across sites to deliver high-performance GPUs for Apple Silicon.

Skills

Verilog

SystemVerilog

Scripting languages

PPA optimization

RTL design

Education

BSc in EE

Job description

Apple (UK) Limited is seeking a GPU Front End Implementation engineer to optimise PPA of the netlist and work closely with RTL and Physical design teams to deliver high-quality netlists for partition milestones. The role involves enhancing methodologies and contributing to outstanding GPUs for Apple products.

You will collaborate with IP teams across multiple sites to translate designs into efficient RTL and gate-level implementations, focusing on timing and performance within Apple Silicon.