Senior GPU Top-Level Physical Design Engineer

. Apple (UK) Limited; Cambridge; Sur place; GBP 90 000 - 120 000; Plein temps

Résumé du poste

Apple (UK) Limited in Cambridge is seeking a GPU Top-Level Physical Design engineer to drive full chip implementation from netlist to tapeout. You will work with the Front-End team to understand RTL and push physical design early in the design cycle, developing methodologies and best‑known methods for best-in-class GPU design.

You will lead place and route at the top level, develop PD guidelines, oversee progress, and coordinate with cross‑functional teams to meet project milestones.

Qualifications

• BSc or MSc in Electrical Engineering with relevant experience.
• ASIC integration including Floorplanning, Clock and Power distribution, IO planning and IP integration.

Responsabilités

• Implement chip design from netlist to tapeout.
• Work with FE team to translate RTL into physical design early in the cycle.
• Develop PD guidelines and checklists and drive execution.
• Be the focal point for place and route at the top level.
• Coordinate PD needs with cross‑functional teams to meet goals.

Connaissances

Floorplanning

Clock distribution

Power distribution

IO planning

IP integration

Physical design

Placement and routing

Timing convergence

Formation

BSc/MSc in EE

Outils

Floorplanning tools

P&R flows

Timing verification

Physical Design Verification

Description du poste

Apple (UK) Limited in Cambridge is seeking a GPU Top-Level Physical Design engineer to drive full chip implementation from netlist to tapeout. You will work with the Front-End team to understand RTL and push physical design early in the design cycle, developing methodologies and best‑known methods for best-in-class GPU design.

You will lead place and route at the top level, develop PD guidelines, oversee progress, and coordinate with cross‑functional teams to meet project milestones.