GPU Physical Design Engineer: PPA & Tape-out Focus

Apple; Cambridge; On-site; GBP 90,000 - 130,000; Full time

Job summary

Apple in Cambridge, United Kingdom, is seeking a highly skilled physical design engineer to help implement complete chip designs from RTL to tape-out for GPUs. You will work with the Front-End team to understand architecture and drive the PD flow, focusing on performance, power and area while navigating complex timing and signoff tasks in a fast-paced environment.

The role requires a strong background in Synthesis, floorplanning, Place & Route, and power distribution, with the ability to solve

Qualifications

• Degree in engineering or equivalent required.
• Experience in ASIC implementation including Synthesis, DFT insertion, Floorplanning, Clock/Power distribution, Place & Route, and timing/electrical/physical signoff.
• Strong fundamentals in PD flows and signoff processes.

Responsibilities

• Collaborate with Front-End to understand chip architecture and drive physical design early in the cycle.
• Drive PD construction and optimization for performance, power and area (PPA).
• Develop guidelines and checklists to streamline PD work and track progress.
• Be focal point for place and route, plan short and long-term work, and manage dependencies.
• Resolve design and flow issues related to physical design and drive execution.

Skills

Synthesis

DFT insertion

Floorplanning

Place & Route

Timing signoff

Physical signoff

Education

BSc/MSEE/MEng/PhD or equivalent

Job description

Apple in Cambridge, United Kingdom, is seeking a highly skilled physical design engineer to help implement complete chip designs from RTL to tape-out for GPUs. You will work with the Front-End team to understand architecture and drive the PD flow, focusing on performance, power and area while navigating complex timing and signoff tasks in a fast-paced environment.

The role requires a strong background in Synthesis, floorplanning, Place & Route, and power distribution, with the ability to solve