Frontend Implementation Engineer - RTL & PPA

Apple; Greater London; On-site; GBP 70,000 - 95,000; Full time

Job summary

Apple in Greater London seeks a hardware engineer to optimize PPA for netlists and work closely with RTL and Physical design teams to deliver high-quality GPU milestones.

The role involves understanding physical synthesis and timing principles, improving methodologies, and collaborating with IP teams across sites. Applicants should align with Apple’s inclusive culture and accessibility commitments.

Qualifications

• BSc in Electrical Engineering (EE) required.
• Experience with Verilog or SystemVerilog and scripting languages.
• Knowledge of physical synthesis and PPA optimization.

Responsibilities

• Responsible for PPA optimisation of the netlist.
• Collaborate with RTL and Physical design teams to deliver milestones.
• Understand and improve current design methodologies for better GPUs.

Skills

Verilog

SystemVerilog

PPA optimization

RTL collaboration

Education

BSc in EE

Tools

DFT tools

STA tools

linting tools

Job description

Apple in Greater London seeks a hardware engineer to optimize PPA for netlists and work closely with RTL and Physical design teams to deliver high-quality GPU milestones.

The role involves understanding physical synthesis and timing principles, improving methodologies, and collaborating with IP teams across sites. Applicants should align with Apple’s inclusive culture and accessibility commitments.