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GMV based in Tres Cantos is seeking graduates in Electronic Engineering, Telecommunications or Computer Science for roles focused on receiver technology. The position emphasizes digital hardware programming and entails defining ASIC architectures, developing RTL blocks, and optimizing internal interfaces.
The company offers a hybrid working model, competitive compensation, wellness programs, and supports career development and language learning.
If interested, contact Carolina Barber Caso for more information.
Are you looking for an innovative and consolidated place for your professional development? GMV is an experienced technology group and…
We are expanding our teams in the GNSS-User Segment Navigation unit to take on projects related to receivers technology. We’ll get to the point; we'll tell you what's not on the web. If you want to know more about us go to GMV website.
As part of the GMV Receivers team, you will have a key role in projects related to receiver technology, contributing to the development of projects and products with strong involvement in R&D activities. You will participate in migrating an architecture currently implemented on Xilinx MPSoC / FPGA to an ASIC solution. Additionally, you will have the opportunity to work on the analysis of the existing design, identification of reusable blocks, adaptation of the hardware architecture, and definition of the ASIC implementation flow.
For this role, we are looking for graduates in Electronic Engineering, Telecommunications, Computer Science, or similar, with a specialization in the field of digital hardware programming.
Additionally, we are seeking profiles with knowledge of digital RTL design, FPGA, SoC or MPSoC architectures, internal buses, IP integration, and functional verification; as well as previous experience in ASIC flow and handling simulation and synthesis tools.
We will also value previous knowledge of STA, DFT, scan, low-power, UPF, floorplanning or backend; verification with SystemVerilog, UVM, assertions or cocotb; embedded ARM/RISC-V processors and hardware/software partitioning; and experience with Synopsys, Cadence, Siemens EDA, Vivado, or Vitis tools.
We promote equal opportunities in recruitment, and we are committed to inclusion and diversity.
If you have any questions please do not hesitate to contact Carolina Barber Caso, in charge of this vacancy.
Carolina Barber Caso