Junior Hardware Engineer (SOC - FPGA and Firmware)

GMV; Tres Cantos; Híbrido; EUR 45.000 - 65.000; Jornada completa

Ventajas ofrecidas por este puesto de trabajo

Health, dental and accident insurance

Free fruit and coffee

Wellbeing training programs

Descripción de la vacante

GMV in Tres Cantos, Spain, is seeking software engineering graduates to join their Receiver team. You will work on the design of digital hardware and firmware in FPGA/SoC embedded systems, contributing to both current and future projects.

The company offers a hybrid work model, competitive compensation, and supports career development with training and international mobility opportunities. Additionally, you will benefit from a well-being program including health insurance and flexible working hours.

Formación

• Graduates in software engineering with an interest in VHDL/Verilog.
• Knowledge in FPGA development and scripting is required.
• Previous experience with digital hardware design is valued.

Responsabilidades

• Participate in design of digital hardware and firmware.
• Involved in coding and verification of FPGA/SoC systems.
• Resource optimization and technical documentation.

Conocimientos

VHDL/Verilog

FPGA development tools

Scripting (Python, TCL, Shell)

C/C++/Rust

Functional verification

Educación

Software engineering degree

Herramientas

Vivado

ModelSIM

Matlab/Simulink

GIT

Descripción del empleo

If you dream about spending the day on the Moon, but you are one of those who get sick on bendy drives... Your place is here! We are expanding our teams in the space sector. We’ll get to the point; we'll tell you what's not on the web. If you want to know more about us go to GMV website.

What challenge will you be taking on?

You will join the Receiver team to participate in the design of digital hardware and firmware in FPGA/SoC based embedded systems. This position is oriented towards long term collaboration on projects in the Receivers and equipment unit, with participation in current and future developments.

Functions

• Coding in VHDL/Verilog.
• Verification by testbenches.
• Code coverage checking.
• Synthesis, implementation, bitstream generation.
• Resource optimization, process automation and technical documentation.

What do we need in our team?

We are looking for software engineering graduates with background and interest in VHDL/Verilog, FPGA development tools (Vivado, ModelSIM), synthesis and implementation, scripting (Python, TCL, Shell), C/C++/Rust, functional verification. We will also value previous experience, and knowledge of standard interfaces (SPI, I2C, Ethernet, etc.), Matlab/Simulink, resource optimization, digital/analog HW design, signal processing, version control (GIT).

What do we offer?

Hybrid working model and 8 weeks per year of teleworking outside your usual geographical area. Flexible start and finish times, and intensive working hours Fridays and in summer. Personalized career plan development, training and language learning support. National and international mobility. If you come from another country, we can offer you a relocation package. Competitive compensation with ongoing reviews, flexible compensation and discount on brands. Wellbeing program: Health, dental and accident insurance, free fruit and coffee, physical, mental and financial health training, and much more!

Recruitment Process & Safety

In our recruitment processes you will always have telephone and personal contact, face-to-face or online, with our talent acquisition team. In addition, bank transfers and bank cards will never be requested. If you are contacted through any other process, please write to our team at [e-mail]

Equal Opportunities

We promote equal opportunities in recruitment, and we are committed to inclusion and diversity.