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A leading semiconductor company is seeking a Senior RTL Engineer to join their Memory IO design team in Vancouver. The candidate will work on defining and implementing RTL for high-speed DDR and inter-chip IO IP, requiring excellent analytical, problem-solving, and communication skills. Preferred qualifications include experience with high-speed interfaces and a degree in Electrical Engineering. This role promises a collaborative environment and diverse work culture.
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We are searching for a senior RTL engineer to join the DDR PHY design team. This is an exciting opportunity to be a member of the Memory IO design team responsible for defining, specifying, and implementing RTL for the next generation of high-speed DDR and inter-chip IO IP for AMD’s graphics and semi-custom products.
The successful candidate will possess:
Vancouver, Canada; Markham, Canada
Benefits offered are described: AMD benefits at a glance.
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