RTL Verification Lead for AI Chiplets

Vertical Compute; Vlaams-Brabant; Sur place; EUR 65 000 - 90 000; Plein temps

Résumé du poste

Vertical Compute is seeking an RTL Verification Engineer to lead the verification of its 3D-integrated chiplets and VIM-enabled AI compute modules. You will drive top-level verification, develop advanced testbenches, and work closely with Front-End RTL, System Architecture, and Software teams to ensure tape-out readiness.

We seek a candidate with proven ASIC/SoC verification experience and strong SystemVerilog/UVM expertise, able to perform coverage-driven verification and root-cause debugging

Qualifications

• Proven ASIC/SoC verification experience.
• Experience with top-level verification of multi-IP designs.
• Strong SystemVerilog and UVM background.
• English fluency in written and spoken.

Responsabilités

• Lead top-level functional verification for the next-generation AI compute chiplet.
• Architect, deploy, and maintain SystemVerilog testbenches, assertions, and constrained-random plans.
• Drive coverage-driven verification and root-cause analysis across hardware/software boundaries.
• Collaborate with Front-End RTL Design, System Architecture, and Software teams for tape-out readiness.
• Benchmark system-level performance and validate post-silicon readiness.

Connaissances

SystemVerilog

UVM

Assertions

Coverage-driven verification

Formation

B.S./M.S./Ph.D. in Electrical Engineering or related

Description du poste

Vertical Compute is seeking an RTL Verification Engineer to lead the verification of its 3D-integrated chiplets and VIM-enabled AI compute modules. You will drive top-level verification, develop advanced testbenches, and work closely with Front-End RTL, System Architecture, and Software teams to ensure tape-out readiness.

We seek a candidate with proven ASIC/SoC verification experience and strong SystemVerilog/UVM expertise, able to perform coverage-driven verification and root-cause debugging