Digital ASIC Design Engineer — RTL & Verification

Vivid Resourcing; Vlaams-Brabant; Sur place; EUR 55 000 - 75 000; Plein temps

Résumé du poste

Vivid Resourcing is seeking a Digital Design Engineer to join an experienced hardware development team in Belgium. You will work across the digital ASIC lifecycle from architecture to verification and implementation, taking ownership of complex digital design blocks and contributing to next-generation semiconductor products.

Collaborating with digital, analogue, verification and systems engineers, you will develop robust RTL, translate requirements into efficient designs and support timing

Qualifications

• Degree in Electrical Engineering, Electronics Engineering or related field.
• Professional experience in digital ASIC design with RTL development.
• Strong knowledge of Verilog and/or SystemVerilog.
• Understanding of digital design principles, RTL coding and synchronous design.
• Experience with ASIC development flows: simulation, synthesis, timing analysis.
• Familiarity with RTL verification and common simulation/EDA tools.
• Ability to work from technical specs and contribute to architectural discussions.
• Strong analytical and problem-solving skills.
• Experience working in multidisciplinary hardware development teams.

Responsabilités

• Design and develop digital ASICs from specification and architecture through to implementation.
• Develop synthesizable RTL using Verilog or SystemVerilog.
• Translate requirements into efficient digital designs.
• Work with verification engineers to ensure robust validation.
• Support simulation, debugging, synthesis and timing analysis.
• Contribute to design reviews and technical decisions across the ASIC process.
• Analyse and resolve RTL and gate-level design issues.
• Collaborate with analogue, mixed-signal, FPGA and systems teams as needed.
• Improve design methodologies, coding standards and development processes.

Connaissances

RTL development

Verilog

SystemVerilog

ASIC design

Formation

Electrical Engineering

Electronics Engineering

Outils

Verilog simulators

SystemVerilog simulators

EDA tools

Description du poste

Vivid Resourcing is seeking a Digital Design Engineer to join an experienced hardware development team in Belgium. You will work across the digital ASIC lifecycle from architecture to verification and implementation, taking ownership of complex digital design blocks and contributing to next-generation semiconductor products.

Collaborating with digital, analogue, verification and systems engineers, you will develop robust RTL, translate requirements into efficient designs and support timing