ASIC design and verification enginner

Capitol International Services Ltd; Belgique; On-site; EUR 50,000 - 70,000; Full time

Job summary

Capitol International Services Ltd is seeking an experienced hardware engineer in Belgium with extensive expertise in ASIC design and verification. This role is contracted for an initial 6 months with possible extensions, and it requires full on-site presence at the client's premises.

The ideal candidate should possess at least 5 years of experience in ASIC design, along with proficiency in debugging RTL and knowledge of SystemVerilog and UVM.

Qualifications

• At least 5 years experience of ASIC design & verification.
• Experience in block level design and specification writing.
• Proficient in debugging RTL at the block level.

Skills

ASIC design & verification

Block level design

Debugging RTL

SystemVerilog

UVM

Fluent English

Job description

For one of our clients in Belgium, we are looking for a hardware engineer with extensive experience in ASIC design and verification. It is for an initial 6 month contract + extensions, and fully on‑site at the client's premises.

Qualifications

• At least 5 years experience of ASIC design & verification
• Block level design and specification writing
• Debugging RTL at the block level
• SystemVerilog and UVM - Fluent English