Remote AMS Verification Engineer for SoC Tapeout

HCL Technologies Limited

Redmond

Remote

AUD 136,000 - 276,000

Full time

2 days ago
Be an early applicant

A complete application in a minute

Tailored resume and cover letter, ready to send.

Get past ATS filters

Job summary

HCLTech is seeking a highly talented AMS Verification Engineer to advance analog mixed signal verification for a DAC channel and its digital interconnect. The role requires hands-on tapeout experience and collaboration across RTL, analog, and verification teams.

You will define and execute the AMS verification plan, develop test environments, and drive mixed-signal verification from test planning through tapeout/signoff.

Qualifications

  • Hands-on SoC tapeout experience.
  • Experience with SoC-level AMS verification.
  • Strong SystemVerilog and UVM verification environments.
  • Experience integrating analog behavioral models with digital RTL.
  • Strong understanding of mixed-signal simulation and verification methodologies.
  • Extensive experience debugging AMS simulations and analog/digital interaction issues.

Responsibilities

  • Develop and work with Verilog-A / Verilog-AMS models for DAC IP.
  • Integrate the analog DAC model with digital RTL to simulate mixed-signal interactions.
  • Define and execute the AMS verification test plan.
  • Develop test environments to simulate mixed-signal design behavior.
  • Perform SoC-level AMS verification of the DAC channel and digital interconnect.
  • Analyze simulation results and compare against target functionality and specs.
  • Debug complex analog/digital interactions, simulation failures, and functional issues.
  • Collaborate with RTL, analog, and verification teams to drive issues to closure.

Skills

SoC tapeout experience
SoC AMS verification
SystemVerilog
UVM
Analog/digital RTL integration
Mixed-signal verification
AMS debugging

Tools

Cadence
Synopsys
Siemens EDA

Job description

HCLTech is seeking a highly talented AMS Verification Engineer to advance analog mixed signal verification for a DAC channel and its digital interconnect. The role requires hands-on tapeout experience and collaboration across RTL, analog, and verification teams.

You will define and execute the AMS verification plan, develop test environments, and drive mixed-signal verification from test planning through tapeout/signoff.

Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

AMS Verification Engineer
AMS Verification Engineer

HCLTech • Redmond

Remote
AUD 136,000 - 276,000
IC Physical Verification Engineer — Calibre Signoff
IC Physical Verification Engineer — Calibre Signoff

HCL Technologies Limited • Redmond

Remote
AUD 136,000 - 276,000
Medical insurance
Dental insurance
Vision insurance
+3
Verification Engineer
Verification Engineer

Motion Recruitment • South Australia

On-site
AUD 100,000 - 120,000
Senior Verification Engineer - SoC/IP Validation Cambridge
Senior Verification Engineer - SoC/IP Validation Cambridge

IC Resources Recruitment • Town of Cambridge

On-site
AUD 114,481 - 171,722
Excellent compensation package
Various non-monetary benefits
Supportive and innovative environment
Lead ASIC Verification Engineer, Satellite Communications
Lead ASIC Verification Engineer, Satellite Communications

Amazon Inc. • Redmond

On-site
AUD 264,000 - 357,000
Design Verification Engineer – SoC Pre-Silicon (SystemVerilog/UVM)
Design Verification Engineer – SoC Pre-Silicon (SystemVerilog/UVM)

Apple, Inc. • Melbourne

Hybrid
AUD 110,000 - 150,000
Senior Verification Engineer
Senior Verification Engineer

IC Resources Recruitment • Town of Cambridge

On-site
AUD 114,481 - 171,722
Excellent compensation package
Various non-monetary benefits
Supportive and innovative environment
Senior DV Engineer - SoC/IP Verification
Senior DV Engineer - SoC/IP Verification

Apple Inc. • Melbourne

Hybrid
AUD 120,000 - 180,000
Remote RTL-to-GDSII Automation Engineer
Remote RTL-to-GDSII Automation Engineer

HCL Technologies Limited • Redmond

Remote
AUD 136,000 - 276,000
Senior FPGA Verification Engineer — RTL, UVM & Xilinx
Senior FPGA Verification Engineer — RTL, UVM & Xilinx

Sapsol Technologies Inc • Melbourne

On-site
AUD 140,000 - 180,000
Top locations