Senior Verification Engineer

IC Resources Recruitment; Town of Cambridge; On-site; AUD 114,481 - 171,722; Full time

Benefits offered by this job

Excellent compensation package

Various non-monetary benefits

Supportive and innovative environment

Job summary

IC Resources Recruitment is seeking a Senior Verification Engineer to lead IP and chip level verification in Cambridge. You will plan and execute verification strategies, collaborate with design teams, and develop test benches from scratch or reuse components to support a high-performance product roadmap.

Responsibilities include creating verification plans, writing SystemVerilog assertions, and ensuring coverage across PCIe/HDMI/USB/AMBA or similar architectures.

Qualifications

• Hands-on verification planning and execution for IP and chip level projects.
• Experience creating test benches from scratch or with reusable components.
• Strong knowledge of verification methodologies and coverage.
• Familiarity with power/low-power verification concepts and memory architectures.
• Experience with embedded C programming for Cortex-M devices.

Responsibilities

• Take ownership of IP and chip level verification planning and execution.
• Collaborate with design team to align on verification approaches.
• Draft detailed verification plans for specific projects.
• Create test benches from scratch or reuse existing components.

Skills

IP verification

Test bench design

SystemVerilog Assertions

SoC verification

Cortex-M embedded C

Tools

SystemVerilog

Python

UVM

Cadence tool flow

Gate-level simulation

Bash

TCL

Make

YAML

Job description

Senior Verification Engineer Overview

• Company Name: IC Resources Recruitment
• Job Role: Senior Verification Engineer
• Qualifications: Not Specified
• Category: IT Jobs
• Job Type: Full Time
• Location: Cambridge

Join a leading British technology company known for its innovative computing platforms that serve millions of developers, educators, engineers, and hobbyists globally. The company is focused on high-performance and accessible computing, establishing itself as a leader in embedded and edge computing technologies. As they expand their in-house ASIC capabilities to support an exciting product roadmap, they are looking for a Senior Verification Engineer to join their team in Cambridge.

The Opportunity

As a Senior Verification Engineer, you will be responsible for the planning and execution of IP and chip level verification. You will work closely with the design team, developing detailed verification plans and creating test benches from scratch or utilizing existing verification components.

Responsibilities

• Take ownership of IP and chip level verification planning and execution.
• Interact regularly with the design team to ensure alignment on verification processes.
• Compose detailed verification plans tailored to specific projects.
• Create test benches from scratch or utilize shared verification components.

Requirements

• Hands-on experience with at least three verification projects.
• Proficiency in creating test benches from scratch using SystemVerilog, Python, or UVM.
• Experience in writing embedded C, preferably for Cortex M-class microcontrollers.
• Strong technical understanding of at least one complex IP protocol such as PCIe, HDMI, USB, SDIO, or AMBA bus architectures.
• Ability to write functional coverage and SystemVerilog Assertions (SVA).
• Good understanding of design and front-end processes.
• Experience with low-power simulations and SoC verification concepts including memory caches, DMA, and security architecture (e.g., TrustZone).
• Familiarity with Cadence simulation tool flow, including gate-level simulation.
• Knowledge of scripting languages such as Bash, TCL, Make, and YAML.

Benefits

• Excellent compensation package.
• Various non-monetary benefits.
• Opportunity to work in a supportive and innovative environment.

This position requires full-time onsite attendance in Cambridge.

Degree Requirement: Not Specified

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