Senior Verification Engineer - SoC/IP Validation Cambridge

IC Resources Recruitment; Town of Cambridge; Presencial; AUD 114 481 - 171 722; Tempo integral

Vantagens oferecidas por esta oferta de emprego

Excellent compensation package

Various non-monetary benefits

Supportive and innovative environment

Resumo da oferta

IC Resources Recruitment is seeking a Senior Verification Engineer to lead IP and chip level verification in Cambridge. You will plan and execute verification strategies, collaborate with design teams, and develop test benches from scratch or reuse components to support a high-performance product roadmap.

Responsibilities include creating verification plans, writing SystemVerilog assertions, and ensuring coverage across PCIe/HDMI/USB/AMBA or similar architectures.

Qualificações

• Hands-on verification planning and execution for IP and chip level projects.
• Experience creating test benches from scratch or with reusable components.
• Strong knowledge of verification methodologies and coverage.
• Familiarity with power/low-power verification concepts and memory architectures.
• Experience with embedded C programming for Cortex-M devices.

Responsabilidades

• Take ownership of IP and chip level verification planning and execution.
• Collaborate with design team to align on verification approaches.
• Draft detailed verification plans for specific projects.
• Create test benches from scratch or reuse existing components.

Conhecimentos

IP verification

Test bench design

SystemVerilog Assertions

SoC verification

Cortex-M embedded C

Ferramentas

SystemVerilog

Python

UVM

Cadence tool flow

Gate-level simulation

Bash

TCL

Make

YAML

Descrição da oferta de emprego

IC Resources Recruitment is seeking a Senior Verification Engineer to lead IP and chip level verification in Cambridge. You will plan and execute verification strategies, collaborate with design teams, and develop test benches from scratch or reuse components to support a high-performance product roadmap.

Responsibilities include creating verification plans, writing SystemVerilog assertions, and ensuring coverage across PCIe/HDMI/USB/AMBA or similar architectures.