Staff Engineer, Mixed-Signal Layout (RF/SerDes)

Infineon Technologies AG

Villach

On-site

EUR 90,000 - 130,000

Full time

5 days ago

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Job summary

Infineon Technologies AG in Austria seeks a Staff Engineer Mixed Signal Layout to drive full-custom IC layout for high‑frequency RF blocks and fast SerDes. You will optimize layouts, run comprehensive physical verifications, and manage parasitics to ensure signal integrity at multi‑gigabit data rates.

We value +5 years in CMOS/FinFET, strong RF expertise, and leadership to mentor junior engineers. Expect close collaboration with RF design, global teams, and a competitive compensation package.

Qualifications

Degree in Electrical Engineering (FH or equivalent).
5+ years in CMOS/FinFET technology and analog/RF layout.
Experience with high‑speed interfaces such as PCIe/Ethernet/USB or SerDes.
Proficient in Cadence Virtuoso and Calibre for layout verification.
Strong communication and leadership to guide a layout team.

Responsibilities

Full-custom IC layout from schematic to tape-out for RF blocks.
Optimize layout to prevent noise coupling and improve isolation.
Run and debug physical verification (DRC/LVS/ERC and antenna checks).
Analyze parasitics to ensure signal and power integrity at high freq.
Lead and mentor layout engineers within the team.

Skills

CMOS & FinFET layout

RF Layout

Analytical skills

Leadership

Project management

English fluency

Education

Bachelor's degree in Electrical Engineering (FH)

Tools

Cadence Virtuoso

Siemens Calibre

Job description

We value +5 years in CMOS/FinFET, strong RF expertise, and leadership to mentor junior engineers. Expect close collaboration with RF design, global teams, and a competitive compensation package.

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