Senior Verification Engineer

TechBiz Global GmbH

Lavamünd

Vor Ort

EUR 90.000 - 130.000

Vollzeit

14 Tage+
Bewerbungsgenerator

Hebe dich für diese Rolle von der Masse ab — erstelle in etwa einer Minute einen maßgeschneiderten Lebenslauf und ein Anschreiben.

Schaffe es an den ATS-Filtern vorbei

Zusammenfassung

TechBiz Global is seeking a Senior Verification Engineer to join a client team developing RISC-V CPU cores. The role focuses on verifying complex digital designs at RTL using advanced methodologies.

You will work within the Verification Team on block/sub-system or top-level verification, employing SystemVerilog/UVM, scripting, and regression tools to ensure design correctness and reliability. English C1 and 8+ years industrial experience are required.

Qualifikationen

  • Master or PhD required.
  • English C1 proficiency.
  • Industrial experience +8 years.
  • Strong SystemVerilog and UVM knowledge.
  • Proficient in Python, Perl, Bash and TCL; regression tools.
  • Experience with simulation tools.
  • Knowledge of revision control with Git and SVN.
  • Experience in block/sub-system or top-level verification.
  • Experience with formal and dynamic verification.
  • Strong problem-solving skills and attention to detail.
  • Excellent communication and teamwork abilities.

Kenntnisse

English C1

Ausbildung

Master or PhD

Tools

SystemVerilog
UVM
Python
Perl
Bash
TCL
Git
SVN

Jobbeschreibung

At TechBiz Global, we are providing recruitment service to our TOP clients from our portfolio. We are currently seeking an Senior Verification Engineer specialist to join one of our clients' teams that develops RISC-V CPU cores. If you're looking for an exciting opportunity to grow in a innovative environment, this could be the perfect fit for you. As a Senior Verification Engineer, you will work within the Verification Team and play a crucial role in ensuring the correctness and functionality of complex digital designs at the Register Transfer Level according to the specification, using advanced verification methodologies and tools to validate the designs.

  • Master or PhD

  • English C1

  • Industrial experience +8 years

  • Proficiency in SystemVerilog and UVM

  • Knowledge of scripting languages (Python, Perl, Bash, TCL) and regression tools

  • Experience with simulation and simulation tools

  • Knowledge of revision control methodology and tools (git, svn)

  • Experience in block level and sub-system or top level verification

  • Experience with formal and dynamic verification

  • Strong problem-solving skills and attention to detail

  • Excellent communication and teamwork abilities

Hol dir deinen kostenlosen, vertraulichen Lebenslauf-Check.
oder ziehe deine Datei hierhin.
Similar jobs

Ähnliche Jobs, die dir auch gefallen könnten

Senior Verification Engineer for RISC-V Cores (UVM, SystemVerilog)
Senior Verification Engineer for RISC-V Cores (UVM, SystemVerilog)

TechBiz Global GmbH • Lavamünd

Vor Ort
EUR 90.000 - 130.000
Senior Digital Verification Engineer
Senior Digital Verification Engineer

IC Resources • Bregenz

Vor Ort
EUR 70.000 - 95.000
Firmware Engineer
Firmware Engineer

TechBiz Global GmbH • Lavamünd

Vor Ort
EUR 65.000 - 90.000
Lead Digital Verification Engineer — UVM & Testbench Expert
Lead Digital Verification Engineer — UVM & Testbench Expert

IC Resources • Bregenz

Vor Ort
EUR 70.000 - 95.000
Remote Lead Digital Verification Architect
Remote Lead Digital Verification Architect

NXP Semiconductors • Österreich

Remote
EUR 70.000 - 100.000
Home office
Flexible working time
Meal benefits
Senior Digital Verification Architect — UVM/SoC
Senior Digital Verification Architect — UVM/SoC

NXP Semiconductors • Gratkorn

Vor Ort
EUR 85.000 - 120.000
Home office
Flexible working time
Meal benefits
Senior Physical Verification Engineer (ICV & DFM)
Senior Physical Verification Engineer (ICV & DFM)

Ams Osram • Premstätten

Vor Ort
EUR 90.000 - 130.000
Senior Digital Verification Architect
Senior Digital Verification Architect

Infineon Technologies AG • Villach

Hybrid
EUR 90.000 - 130.000
HEAD OF RISC-V ENGINEERING (f/m/d)
HEAD OF RISC-V ENGINEERING (f/m/d)

CISC Semiconductor GmbH • Klagenfurt am Wörthersee

Vor Ort
EUR 120.000 - 170.000
Flexible working hours
Senior Physical Verification Engineer IC Signoff
Senior Physical Verification Engineer IC Signoff

Ams Osram • Österreich

Remote
EUR 90.000 - 130.000