Remote Lead Digital Verification Architect

NXP Semiconductors; Österreich; Remote; EUR 70,000 - 100,000; Full time

Benefits offered by this job

Home office

Flexible working time

Meal benefits

Job summary

NXP Semiconductors Austria is seeking an experienced Verification Engineer to own the verification of submodules and IPs, and to collaborate on an integrated verification strategy. You will work with architects, DV teammates, and system engineers to drive metrics, testbenches, and validation across project phases.

The role requires a Master/PhD in a relevant field, 8+ years of experience, and strong SystemVerilog/UVM skills. Proficiency in Verilog, scripting, and VCS-like tooling is essential.

Qualifications

• Eight+ years of proven professional experience in Digital Design and Verification.
• SystemVerilog and UVM training certifications from EDA vendors.
• Advanced knowledge of Verilog/SystemVerilog; VHDL a plus.
• Experience in testbench design and development using UVM.
• Proficiency in metric-driven verification concepts, coverage, and directed/random testing.
• Familiarity with ASIC/SoC design flow and processes.
• Strong scripting skills (bash/tcsh, tcl, Python, C).

Responsibilities

• Own verification of submodules and verification IPs/testbenches across integration levels.
• Review and discuss subsystem requirements and design specs for new increments.
• Collaborate with architects and discipline leads to define verification strategy.
• Break down strategy into tasks and support planning with effort priors.
• Define metrics and methods to assess verification completion.
• Document testbench components, specs, and verification reports.
• Track verification activities and ensure adherence to processes.
• Interact with HW/SW designers and system engineers to resolve issues.
• Maintain and improve DV process and methodology through updates.

Skills

SystemVerilog

UVM

Verilog

Python

Tcl

Bash

C

Debugging

Education

Master or PhD in Electrical/Electronic Engineering or Computer Science

Tools

GIT

SVN

ClearCase

Job description

NXP Semiconductors Austria is seeking an experienced Verification Engineer to own the verification of submodules and IPs, and to collaborate on an integrated verification strategy. You will work with architects, DV teammates, and system engineers to drive metrics, testbenches, and validation across project phases.

The role requires a Master/PhD in a relevant field, 8+ years of experience, and strong SystemVerilog/UVM skills. Proficiency in Verilog, scripting, and VCS-like tooling is essential.