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Apple Inc. seeks a Verification Platform Engineer for Platform Architecture to advance high‑performance RTL simulation tooling and DV workflows.
You will own engagements with silicon engineering, modify testbenches, and improve throughput through infrastructure improvements and platform R&D. Ideal candidates have a BS in EE/CE, strong SystemVerilog and EDA tooling experience, and hands‑on DV methods (UVM, DPI‑C).
Apple Inc. seeks a Verification Platform Engineer for Platform Architecture to advance high‑performance RTL simulation tooling and DV workflows.
You will own engagements with silicon engineering, modify testbenches, and improve throughput through infrastructure improvements and platform R&D. Ideal candidates have a BS in EE/CE, strong SystemVerilog and EDA tooling experience, and hands‑on DV methods (UVM, DPI‑C).