Timing-Driven ASIC Implementation Engineer

Meta Careers; Austin (TX); On-site; USD 114,000 - 172,000; Full time

Job summary

Meta's Infrastructure Silicon team is seeking an ASIC Implementation Engineer specializing in timing to drive static timing analysis and timing closure across complex SoCs for data center applications.

You will develop timing constraints, run sign-off STA with PrimeTime, collaborate with physical design, and contribute to timing libraries and automation. This role is based in Austin, TX with competitive compensation, bonus, and equity.

Qualifications

• 2+ years of ASIC implementation experience focused on static timing analysis and timing closure.
• Experience with industry-standard STA and sign-off tools such as PrimeTime.
• Experience developing and validating SDC timing constraints for complex SoC designs.
• Ability to script timing analysis and reporting flows using Python, Tcl or Perl.

Responsibilities

• Develop and maintain timing constraints (SDC) for complex SoC designs.
• Perform static timing analysis to identify setup/hold violations and clock skew.
• Drive timing closure with physical design teams for timing targets.
• Analyze timing paths across clock domains and suggest RTL or layout optimizations.
• Generate and validate timing reports for sign-off across corners and OCV.
• Maintain timing exception methodologies and waiver processes.
• Develop timing closure scripts and automation to improve efficiency.

Skills

Static timing analysis

Timing closure

Scripting (Python, Tcl, Perl)

Tools

PrimeTime

Job description

Meta's Infrastructure Silicon team is seeking an ASIC Implementation Engineer specializing in timing to drive static timing analysis and timing closure across complex SoCs for data center applications.

You will develop timing constraints, run sign-off STA with PrimeTime, collaborate with physical design, and contribute to timing libraries and automation. This role is based in Austin, TX with competitive compensation, bonus, and equity.