Staff Verification Engineer, ASIC/SoC & UVM Expert

Analog Devices

Wilmington (MA)

Hybrid

USD 172,000 - 210,000

Full time

14 days+
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Benefits offered by this job

Medical coverage
Vision coverage
Dental coverage
401k
Paid vacation
Holidays
Sick time

Job summary

Analog Devices, Inc. in Wilmington, MA, is seeking a Staff Engineer in Design Verification Engineering to lead advanced verification for ASIC/SOC blocks. The role requires SystemVerilog/UVM expertise, metric-driven verification, and collaboration with cross-functional teams.

Partial telecommuting (2 days/week) is available, with a competitive six-figure salary and comprehensive benefits. Come join a global leader investing in innovation, learning opportunities, and a culture focused on impact

Qualifications

  • Master's degree in CS/CE/EE or related field with 4+ years verif engineering or related IC design experience.
  • Alternatively, Bachelor's degree with 6 years verification/IC design experience.
  • Expertise in metric-driven verification across full lifecycle, test planning and coverage.
  • Proficient with SystemVerilog, UVM, DV environments and VIP integration.

Responsibilities

  • Develop and execute UVM-based verification environments for ASIC/SOC designs.
  • Create verification plans and constrained-random/directed test cases.
  • Write and analyze functional coverage, assertions, and metrics.
  • Integrate third-party/custom VIPs into UVM testbenches.
  • Collaborate with design and cross-functional teams to review plans and ensure coverage.
  • Support post-silicon verification activities and driver scripts.
  • Automate simulation data analysis and model validation.
  • Partial telecommute: 2 days per week from home.

Skills

SystemVerilog
UVM
DV testing
Scripting languages

Education

Master's degree in CS/CE/EE or related field
Bachelor's degree in CS/CE/EE or related field

Tools

UVM framework
SystemVerilog
VIPs integration
Scripting (Python)

Job description

Analog Devices, Inc. in Wilmington, MA, is seeking a Staff Engineer in Design Verification Engineering to lead advanced verification for ASIC/SOC blocks. The role requires SystemVerilog/UVM expertise, metric-driven verification, and collaboration with cross-functional teams.

Partial telecommuting (2 days/week) is available, with a competitive six-figure salary and comprehensive benefits. Come join a global leader investing in innovation, learning opportunities, and a culture focused on impact

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